Merge tag 'u-boot-rockchip-20240207' of https://source.denx.de/u-boot/custodians/u-boot-rockchipWIP/07Feb2024

- Add board: rv1126 Sonoff iHost board
- rv1126 ddr4 support;
- Enable BOOTSTD_FULL for RK3399 and RK3588;
- rk3036 spl stack addr fix;
- dts sync from linux v6.8-rc1 for rk356x, rk3588, rv1126;
- Enable eMMC HS200 mode by default for rk3568 and rk3588;

10 files changed, 545 insertions, 4 deletions

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 285332d..706fb12 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -71,7 +71,6 @@
 #define DLL_RXCLK_NO_INVERTER		BIT(29)
 #define DLL_RXCLK_ORI_GATE		BIT(31)
 #define DLL_TXCLK_TAPNUM_DEFAULT	0x10
-#define DLL_TXCLK_TAPNUM_90_DEGREES	0x9
 #define DLL_TXCLK_TAPNUM_FROM_SW	BIT(24)
 #define DLL_TXCLK_NO_INVERTER		BIT(29)
 #define DLL_STRBIN_TAPNUM_DEFAULT	0x4
@@ -314,8 +313,10 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab
 	int val, ret;
 	u32 extra, txclk_tapnum;
 
-	if (!enable)
+	if (!enable) {
+		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
 		return 0;
+	}
 
 	if (clock >= 100 * MHz) {
 		/* reset DLL */
@@ -648,7 +649,7 @@ static const struct sdhci_data rk3568_data = {
 	.config_dll = rk3568_sdhci_config_dll,
 	.flags = FLAG_INVERTER_FLAG_IN_RXCLK,
 	.hs200_txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT,
-	.hs400_txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT,
+	.hs400_txclk_tapnum = 0x8,
 };
 
 static const struct sdhci_data rk3588_data = {
@@ -656,7 +657,7 @@ static const struct sdhci_data rk3588_data = {
 	.set_clock = rk3568_sdhci_set_clock,
 	.config_dll = rk3568_sdhci_config_dll,
 	.hs200_txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT,
-	.hs400_txclk_tapnum = DLL_TXCLK_TAPNUM_90_DEGREES,
+	.hs400_txclk_tapnum = 0x9,
 };
 
 static const struct udevice_id sdhci_ids[] = {
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index c869635..c15fb36 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -13,6 +13,7 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <eth_phy.h>
 #include <log.h>
 #include <miiphy.h>
 #include <malloc.h>
@@ -576,6 +577,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 	struct phy_device *phydev;
 	int ret;
 
+	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+		eth_phy_set_mdio_bus(dev, NULL);
+
 #if IS_ENABLED(CONFIG_DM_MDIO)
 	phydev = dm_eth_phy_connect(dev);
 	if (!phydev)
@@ -583,6 +587,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 #else
 	int phy_addr = -1;
 
+	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+		phy_addr = eth_phy_get_addr(dev);
+
 #ifdef CONFIG_PHY_ADDR
 	phy_addr = CONFIG_PHY_ADDR;
 #endif
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-1056.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-1056.inc
new file mode 100644
index 0000000..295b087
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-1056.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x561d1219},
+			{0x10030703},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000034b},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 1056,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x008000b9},	/* RFSHTMG */
+			{0x000000d0, 0x00020103},	/* INIT0 */
+			{0x000000d4, 0x00690000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x07340401},	/* INIT3 */
+			{0x000000e0, 0x00100000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000800},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0f102411},	/* DRAMTMG0 */
+			{0x00000104, 0x0004041a},	/* DRAMTMG1 */
+			{0x00000108, 0x0608060d},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x08030409},	/* DRAMTMG4 */
+			{0x00000114, 0x06060403},	/* DRAMTMG5 */
+			{0x00000120, 0x07070d07},	/* DRAMTMG8 */
+			{0x00000124, 0x00020309},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07060004},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000614},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x00000010},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000b},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-328.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-328.inc
new file mode 100644
index 0000000..4b424fb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-328.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d110a08},
+			{0x06020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000232},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 328,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x0027003a},	/* RFSHTMG */
+			{0x000000d0, 0x00020052},	/* INIT0 */
+			{0x000000d4, 0x00220000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x09060b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00020209},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x03030b03},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-396.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-396.inc
new file mode 100644
index 0000000..980be8c
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-396.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d110a0a},
+			{0x07020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000232},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 396,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x00300046},	/* RFSHTMG */
+			{0x000000d0, 0x00020062},	/* INIT0 */
+			{0x000000d4, 0x00280000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x09070d07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020a},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x04040b04},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-528.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-528.inc
new file mode 100644
index 0000000..3bde055
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-528.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d120a0d},
+			{0x09020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000232},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 528,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x0040005d},	/* RFSHTMG */
+			{0x000000d0, 0x00020082},	/* INIT0 */
+			{0x000000d4, 0x00350000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0a0a1209},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020e},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x04040b04},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-664.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-664.inc
new file mode 100644
index 0000000..c934116
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-664.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d130a11},
+			{0x0c020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000023a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 664,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x00500075},	/* RFSHTMG */
+			{0x000000d0, 0x000200a4},	/* INIT0 */
+			{0x000000d4, 0x00420000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x01040401},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0b0c160c},	/* DRAMTMG0 */
+			{0x00000104, 0x00020211},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030306},	/* DRAMTMG4 */
+			{0x00000114, 0x04040302},	/* DRAMTMG5 */
+			{0x00000120, 0x05050b05},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc
new file mode 100644
index 0000000..ef2e934
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-784.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x50160d14},
+			{0x0e020502},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000033a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 784,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x005f008a},	/* RFSHTMG */
+			{0x000000d0, 0x000200c1},	/* INIT0 */
+			{0x000000d4, 0x004e0000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x03140401},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0c0e1a0e},	/* DRAMTMG0 */
+			{0x00000104, 0x00030314},	/* DRAMTMG1 */
+			{0x00000108, 0x0506050b},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x06030307},	/* DRAMTMG4 */
+			{0x00000114, 0x04040302},	/* DRAMTMG5 */
+			{0x00000120, 0x06060b06},	/* DRAMTMG8 */
+			{0x00000124, 0x00020308},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07040003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0600060c},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000c},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-924.inc b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-924.inc
new file mode 100644
index 0000000..acb33bd
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr4-detect-924.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x531a0f17},
+			{0x0e020603},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000342},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 924,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x007000a2},	/* RFSHTMG */
+			{0x000000d0, 0x000200e3},	/* INIT0 */
+			{0x000000d4, 0x005c0000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x05240401},	/* INIT3 */
+			{0x000000e0, 0x00080000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0e0e1f10},	/* DRAMTMG0 */
+			{0x00000104, 0x00030317},	/* DRAMTMG1 */
+			{0x00000108, 0x0507050c},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x07030308},	/* DRAMTMG4 */
+			{0x00000114, 0x05050303},	/* DRAMTMG5 */
+			{0x00000120, 0x07070b07},	/* DRAMTMG8 */
+			{0x00000124, 0x00020309},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07050003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000610},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000a},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 9e1376a..0a78e18 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -76,6 +76,14 @@ struct rv1126_sdram_params sdram_configs[] = {
 # include	"sdram-rv1126-lpddr4-detect-784.inc"
 # include	"sdram-rv1126-lpddr4-detect-924.inc"
 # include	"sdram-rv1126-lpddr4-detect-1056.inc"
+#elif defined(CONFIG_RAM_ROCKCHIP_DDR4)
+# include	"sdram-rv1126-ddr4-detect-328.inc"
+# include	"sdram-rv1126-ddr4-detect-396.inc"
+# include	"sdram-rv1126-ddr4-detect-528.inc"
+# include	"sdram-rv1126-ddr4-detect-664.inc"
+# include	"sdram-rv1126-ddr4-detect-784.inc"
+# include	"sdram-rv1126-ddr4-detect-924.inc"
+# include	"sdram-rv1126-ddr4-detect-1056.inc"
 #else
 # include	"sdram-rv1126-ddr3-detect-328.inc"
 # include	"sdram-rv1126-ddr3-detect-396.inc"