diff options
author | Tom Rini <trini@konsulko.com> | 2017-05-15 20:17:56 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2017-05-16 08:10:50 -0400 |
commit | 4125bbcef6a998ce8580a1f5c53c8c93a56a125b (patch) | |
tree | 291b37802625be36bced91db4f86b158e41c2e13 /drivers | |
parent | d09ec7f81650425140776995fc9752189ddf7956 (diff) | |
parent | b3125088a3cc362a21aa3bbd0c0e4e74d74a6f2b (diff) | |
download | u-boot-4125bbcef6a998ce8580a1f5c53c8c93a56a125b.zip u-boot-4125bbcef6a998ce8580a1f5c53c8c93a56a125b.tar.gz u-boot-4125bbcef6a998ce8580a1f5c53c8c93a56a125b.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
- Add #undef CONFIG_DM_MMC_OPS to omap3_logic in the SPL build case, to
match other TI platforms in the same situation.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/Makefile | 1 | ||||
-rw-r--r-- | drivers/mmc/Kconfig | 5 | ||||
-rw-r--r-- | drivers/mmc/Makefile | 28 | ||||
-rw-r--r-- | drivers/mmc/atmel_sdhci.c | 4 | ||||
-rw-r--r-- | drivers/mmc/davinci_mmc.c | 2 | ||||
-rw-r--r-- | drivers/mmc/omap_hsmmc.c | 39 | ||||
-rw-r--r-- | drivers/mmc/sdhci-cadence.c | 67 | ||||
-rw-r--r-- | drivers/mmc/sdhci.c | 18 |
8 files changed, 117 insertions, 47 deletions
diff --git a/drivers/Makefile b/drivers/Makefile index 6916420..64c39d3 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -76,6 +76,7 @@ obj-y += firmware/ obj-$(CONFIG_FPGA) += fpga/ obj-y += hwmon/ obj-y += misc/ +obj-$(CONFIG_MMC) += mmc/ obj-y += pcmcia/ obj-y += dfu/ obj-$(CONFIG_X86) += pch/ diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6ac26dd..0dd4443 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -10,10 +10,6 @@ config MMC If you want MMC/SD/SDIO support, you should say Y here and also to your specific host controller driver. -config GENERIC_MMC - bool "Generic MMC driver framework" - default MMC - config DM_MMC bool "Enable MMC controllers using Driver Model" depends on DM @@ -138,6 +134,7 @@ config MMC_PCI config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" + select DM_MMC_OPS if DM_MMC help This selects the TI OMAP High Speed Multimedia card Interface. If you have an omap2plus board with a Multimedia Card slot, diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index de91f14..a078649 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -5,17 +5,24 @@ # SPDX-License-Identifier: GPL-2.0+ # -ifdef CONFIG_DM_MMC -obj-$(CONFIG_GENERIC_MMC) += mmc-uclass.o -endif +obj-y += mmc.o +obj-$(CONFIG_DM_MMC) += mmc-uclass.o ifndef CONFIG_BLK -obj-$(CONFIG_GENERIC_MMC) += mmc_legacy.o +obj-y += mmc_legacy.o +endif + +obj-$(CONFIG_SUPPORT_EMMC_BOOT) += mmc_boot.o + +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o +obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o +else +obj-y += mmc_write.o endif obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o - obj-$(CONFIG_MMC_DW) += dw_mmc.o obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o @@ -23,10 +30,6 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o -obj-$(CONFIG_GENERIC_MMC) += mmc.o -ifdef CONFIG_SUPPORT_EMMC_BOOT -obj-$(CONFIG_GENERIC_MMC) += mmc_boot.o -endif obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o obj-$(CONFIG_MMC_SPI) += mmc_spi.o @@ -42,13 +45,6 @@ obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o -ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o -obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o -else -obj-$(CONFIG_GENERIC_MMC) += mmc_write.o -endif - # SDHCI obj-$(CONFIG_MMC_SDHCI) += sdhci.o obj-$(CONFIG_MMC_SDHCI_ATMEL) += atmel_sdhci.o diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index 8522557..86e36a9 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -28,7 +28,7 @@ int atmel_sdhci_init(void *regbase, u32 id) host->name = "atmel_sdhci"; host->ioaddr = regbase; - host->quirks = 0; + host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; max_clk = at91_get_periph_generated_clk(id); if (!max_clk) { printf("%s: Failed to get the proper clock\n", __func__); @@ -74,7 +74,7 @@ static int atmel_sdhci_probe(struct udevice *dev) host->name = dev->name; host->ioaddr = (void *)dev_get_addr(dev); - host->quirks = 0; + host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD; host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "bus-width", 4); diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index 9edb668..dd78429 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -347,7 +347,7 @@ static int dmmc_init(struct mmc *mmc) return 0; } -/* Set buswidth or clock as indicated by the GENERIC_MMC framework */ +/* Set buswidth or clock as indicated by the MMC framework */ static int dmmc_set_ios(struct mmc *mmc) { struct davinci_mmc *host = mmc->priv; diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index c136ab0..0b21ec6 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -326,11 +326,17 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit) } } } - +#ifndef CONFIG_DM_MMC static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); +#else +static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct omap_hsmmc_data *priv = dev_get_priv(dev); +#endif struct hsmmc *mmc_base; unsigned int flags, mmc_stat; ulong start; @@ -558,9 +564,17 @@ static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, return 0; } +#ifndef CONFIG_DM_MMC static int omap_hsmmc_set_ios(struct mmc *mmc) { struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); +#else +static int omap_hsmmc_set_ios(struct udevice *dev) +{ + struct omap_hsmmc_data *priv = dev_get_priv(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct mmc *mmc = upriv->mmc; +#endif struct hsmmc *mmc_base; unsigned int dsor = 0; ulong start; @@ -617,9 +631,9 @@ static int omap_hsmmc_set_ios(struct mmc *mmc) #ifdef OMAP_HSMMC_USE_GPIO #ifdef CONFIG_DM_MMC -static int omap_hsmmc_getcd(struct mmc *mmc) +static int omap_hsmmc_getcd(struct udevice *dev) { - struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); + struct omap_hsmmc_data *priv = dev_get_priv(dev); int value; value = dm_gpio_get_value(&priv->cd_gpio); @@ -632,9 +646,9 @@ static int omap_hsmmc_getcd(struct mmc *mmc) return value; } -static int omap_hsmmc_getwp(struct mmc *mmc) +static int omap_hsmmc_getwp(struct udevice *dev) { - struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); + struct omap_hsmmc_data *priv = dev_get_priv(dev); int value; value = dm_gpio_get_value(&priv->wp_gpio); @@ -674,6 +688,16 @@ static int omap_hsmmc_getwp(struct mmc *mmc) #endif #endif +#ifdef CONFIG_DM_MMC +static const struct dm_mmc_ops omap_hsmmc_ops = { + .send_cmd = omap_hsmmc_send_cmd, + .set_ios = omap_hsmmc_set_ios, +#ifdef OMAP_HSMMC_USE_GPIO + .get_cd = omap_hsmmc_getcd, + .get_wp = omap_hsmmc_getwp, +#endif +}; +#else static const struct mmc_ops omap_hsmmc_ops = { .send_cmd = omap_hsmmc_send_cmd, .set_ios = omap_hsmmc_set_ios, @@ -683,6 +707,7 @@ static const struct mmc_ops omap_hsmmc_ops = { .getwp = omap_hsmmc_getwp, #endif }; +#endif #ifndef CONFIG_DM_MMC int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, @@ -835,7 +860,6 @@ static int omap_hsmmc_probe(struct udevice *dev) struct mmc *mmc; cfg->name = "OMAP SD/MMC"; - cfg->ops = &omap_hsmmc_ops; priv->base_addr = plat->base_addr; #ifdef OMAP_HSMMC_USE_GPIO priv->cd_inverted = plat->cd_inverted; @@ -857,7 +881,7 @@ static int omap_hsmmc_probe(struct udevice *dev) mmc->dev = dev; upriv->mmc = mmc; - return 0; + return omap_hsmmc_init_setup(mmc); } #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) @@ -901,6 +925,7 @@ U_BOOT_DRIVER(omap_hsmmc) = { #ifdef CONFIG_BLK .bind = omap_hsmmc_bind, #endif + .ops = &omap_hsmmc_ops, .probe = omap_hsmmc_probe, .priv_auto_alloc_size = sizeof(struct omap_hsmmc_data), .flags = DM_FLAG_PRE_RELOC, diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c index 2253bbc..dc86d10 100644 --- a/drivers/mmc/sdhci-cadence.c +++ b/drivers/mmc/sdhci-cadence.c @@ -7,8 +7,10 @@ #include <common.h> #include <linux/io.h> +#include <linux/iopoll.h> #include <linux/sizes.h> #include <dm/device.h> +#include <libfdt.h> #include <mmc.h> #include <sdhci.h> @@ -17,7 +19,7 @@ #define SDHCI_CDNS_HRS04_ACK BIT(26) #define SDHCI_CDNS_HRS04_RD BIT(25) #define SDHCI_CDNS_HRS04_WR BIT(24) -#define SDHCI_CDNS_HRS04_RDATA_SHIFT 12 +#define SDHCI_CDNS_HRS04_RDATA_SHIFT 16 #define SDHCI_CDNS_HRS04_WDATA_SHIFT 8 #define SDHCI_CDNS_HRS04_ADDR_SHIFT 0 @@ -34,6 +36,9 @@ #define SDHCI_CDNS_PHY_DLY_EMMC_LEGACY 0x06 #define SDHCI_CDNS_PHY_DLY_EMMC_SDR 0x07 #define SDHCI_CDNS_PHY_DLY_EMMC_DDR 0x08 +#define SDHCI_CDNS_PHY_DLY_SDCLK 0x0b +#define SDHCI_CDNS_PHY_DLY_HSMMC 0x0c +#define SDHCI_CDNS_PHY_DLY_STROBE 0x0d struct sdhci_cdns_plat { struct mmc_config cfg; @@ -41,11 +46,31 @@ struct sdhci_cdns_plat { void __iomem *hrs_addr; }; -static void sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat, - u8 addr, u8 data) +struct sdhci_cdns_phy_cfg { + const char *property; + u8 addr; +}; + +static const struct sdhci_cdns_phy_cfg sdhci_cdns_phy_cfgs[] = { + { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, }, + { "cdns,phy-input-delay-legacy", SDHCI_CDNS_PHY_DLY_SD_DEFAULT, }, + { "cdns,phy-input-delay-sd-uhs-sdr12", SDHCI_CDNS_PHY_DLY_UHS_SDR12, }, + { "cdns,phy-input-delay-sd-uhs-sdr25", SDHCI_CDNS_PHY_DLY_UHS_SDR25, }, + { "cdns,phy-input-delay-sd-uhs-sdr50", SDHCI_CDNS_PHY_DLY_UHS_SDR50, }, + { "cdns,phy-input-delay-sd-uhs-ddr50", SDHCI_CDNS_PHY_DLY_UHS_DDR50, }, + { "cdns,phy-input-delay-mmc-highspeed", SDHCI_CDNS_PHY_DLY_EMMC_SDR, }, + { "cdns,phy-input-delay-mmc-ddr", SDHCI_CDNS_PHY_DLY_EMMC_DDR, }, + { "cdns,phy-dll-delay-sdclk", SDHCI_CDNS_PHY_DLY_SDCLK, }, + { "cdns,phy-dll-delay-sdclk-hsmmc", SDHCI_CDNS_PHY_DLY_HSMMC, }, + { "cdns,phy-dll-delay-strobe", SDHCI_CDNS_PHY_DLY_STROBE, }, +}; + +static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat, + u8 addr, u8 data) { void __iomem *reg = plat->hrs_addr + SDHCI_CDNS_HRS04; u32 tmp; + int ret; tmp = (data << SDHCI_CDNS_HRS04_WDATA_SHIFT) | (addr << SDHCI_CDNS_HRS04_ADDR_SHIFT); @@ -54,17 +79,36 @@ static void sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat, tmp |= SDHCI_CDNS_HRS04_WR; writel(tmp, reg); + ret = readl_poll_timeout(reg, tmp, tmp & SDHCI_CDNS_HRS04_ACK, 10); + if (ret) + return ret; + tmp &= ~SDHCI_CDNS_HRS04_WR; writel(tmp, reg); + + return 0; } -static void sdhci_cdns_phy_init(struct sdhci_cdns_plat *plat) +static int sdhci_cdns_phy_init(struct sdhci_cdns_plat *plat, + const void *fdt, int nodeoffset) { - sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_SD_HS, 4); - sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_SD_DEFAULT, 4); - sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_EMMC_LEGACY, 9); - sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_EMMC_SDR, 2); - sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_EMMC_DDR, 3); + const u32 *prop; + int ret, i; + + for (i = 0; i < ARRAY_SIZE(sdhci_cdns_phy_cfgs); i++) { + prop = fdt_getprop(fdt, nodeoffset, + sdhci_cdns_phy_cfgs[i].property, NULL); + if (!prop) + continue; + + ret = sdhci_cdns_write_phy_reg(plat, + sdhci_cdns_phy_cfgs[i].addr, + fdt32_to_cpu(*prop)); + if (ret) + return ret; + } + + return 0; } static int sdhci_cdns_bind(struct udevice *dev) @@ -76,6 +120,7 @@ static int sdhci_cdns_bind(struct udevice *dev) static int sdhci_cdns_probe(struct udevice *dev) { + DECLARE_GLOBAL_DATA_PTR; struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct sdhci_cdns_plat *plat = dev_get_platdata(dev); struct sdhci_host *host = dev_get_priv(dev); @@ -94,7 +139,9 @@ static int sdhci_cdns_probe(struct udevice *dev) host->ioaddr = plat->hrs_addr + SDHCI_CDNS_SRS_BASE; host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD; - sdhci_cdns_phy_init(plat); + ret = sdhci_cdns_phy_init(plat, gd->fdt_blob, dev->of_offset); + if (ret) + return ret; ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); if (ret) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index b745977..161a6b1 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -332,8 +332,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) */ if (host->clk_mul) { for (div = 1; div <= 1024; div++) { - if ((host->max_clk * host->clk_mul / div) - <= clock) + if ((host->max_clk / div) <= clock) break; } @@ -547,6 +546,14 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, #ifndef CONFIG_DM_MMC_OPS cfg->ops = &sdhci_ops; #endif + + /* Check whether the clock multiplier is supported or not */ + if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> + SDHCI_CLOCK_MUL_SHIFT; + } + if (host->max_clk == 0) { if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) >> @@ -555,6 +562,8 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; host->max_clk *= 1000000; + if (host->clk_mul) + host->max_clk *= host->clk_mul; } if (host->max_clk == 0) { printf("%s: Hardware doesn't specify base clock frequency\n", @@ -590,11 +599,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { if (!(caps & SDHCI_CAN_DO_8BIT)) cfg->host_caps &= ~MMC_MODE_8BIT; - - /* Find out whether clock multiplier is supported */ - caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); - host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> - SDHCI_CLOCK_MUL_SHIFT; } if (host->host_caps) |