Merge tag 'xilinx-for-v2023.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2023.01-rc3

microblaze:
- Enable 32 bit addressing mode for SPIs

zynq:
- Minor DT fixes (PL clock enabling)

zynqmp:
- Disable watchdog by default
- Remove unused xlnx,eeprom chosen support
- Add missing symlink for vck190 SC revB
- Use mdio bus with ethernet-phy-id description

versal:
- Add mini qspi/ospi configuration

versal-net:
- Add soc driver
- Fix Kconfig entry for SOC
- Fix loading address location for MINI configuration
- Disable LMB for mini configuration

net:
- Fix ethernet-phy-id usage in the code

pinctrl:
- Revert high impedance/output enable support

timer:
- Fix timer relocation for Microblaze
- Fix timer wrap in 32bit Xilinx timer driver

10 files changed, 109 insertions, 32 deletions

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 14bbfe7..4d56b1a 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1197,12 +1197,12 @@ int ofnode_read_eth_phy_id(ofnode node, u16 *vendor, u16 *device)
 	while (list < end) {
 		len = strlen(list);
 
-		if (len >= strlen("ethernet-phy-idVVVV,DDDD")) {
+		if (len >= strlen("ethernet-phy-idVVVV.DDDD")) {
 			char *s = strstr(list, "ethernet-phy-id");
 
 			/*
 			 * check if the string is something like
-			 * ethernet-phy-idVVVV,DDDD
+			 * ethernet-phy-idVVVV.DDDD
 			 */
 			if (s && s[19] == '.') {
 				s += strlen("ethernet-phy-id");
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 3f4357e..507b19b 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -662,21 +662,6 @@ static void zynq_gem_halt(struct udevice *dev)
 						ZYNQ_GEM_NWCTRL_TXEN_MASK, 0);
 }
 
-__weak int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
-{
-	return -ENOSYS;
-}
-
-static int zynq_gem_read_rom_mac(struct udevice *dev)
-{
-	struct eth_pdata *pdata = dev_get_plat(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return zynq_board_read_rom_ethaddr(pdata->enetaddr);
-}
-
 static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr,
 				int devad, int reg)
 {
@@ -884,7 +869,6 @@ static const struct eth_ops zynq_gem_ops = {
 	.free_pkt		= zynq_gem_free_pkt,
 	.stop			= zynq_gem_halt,
 	.write_hwaddr		= zynq_gem_setup_mac,
-	.read_rom_hwaddr	= zynq_gem_read_rom_mac,
 };
 
 static int zynq_gem_of_to_plat(struct udevice *dev)
diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c
index 52d428f..7c5a02d 100644
--- a/drivers/pinctrl/pinctrl-zynqmp.c
+++ b/drivers/pinctrl/pinctrl-zynqmp.c
@@ -467,10 +467,6 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin,
 				 pin);
 		break;
 	case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
-		param = PM_PINCTRL_CONFIG_TRI_STATE;
-		arg = PM_PINCTRL_TRI_STATE_ENABLE;
-		ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
-		break;
 	case PIN_CONFIG_LOW_POWER_MODE:
 		/*
 		 * This cases are mentioned in dts but configurable
@@ -479,11 +475,6 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin,
 		 */
 		ret = 0;
 		break;
-	case PIN_CONFIG_OUTPUT_ENABLE:
-		param = PM_PINCTRL_CONFIG_TRI_STATE;
-		arg = PM_PINCTRL_TRI_STATE_DISABLE;
-		ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
-		break;
 	default:
 		dev_warn(dev, "unsupported configuration parameter '%u'\n",
 			 param);
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 292dc41..acf555b 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -32,6 +32,14 @@ config SOC_XILINX_VERSAL
 	  This allows other drivers to verify the SoC familiy & revision using
 	  matching SoC attributes.
 
+config SOC_XILINX_VERSAL_NET
+	bool "Enable SoC Device ID driver for Xilinx Versal NET"
+	depends on SOC_DEVICE && ARCH_VERSAL_NET
+	help
+	  Enable this option to select SoC device id driver for Xilinx Versal NET.
+	  This allows other drivers to verify the SoC familiy & revision using
+	  matching SoC attributes.
+
 source "drivers/soc/ti/Kconfig"
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 031fa76..8438565 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o
 obj-$(CONFIG_SANDBOX) += soc_sandbox.o
 obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o
 obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o
+obj-$(CONFIG_SOC_XILINX_VERSAL_NET) += soc_xilinx_versal_net.o
diff --git a/drivers/soc/soc_xilinx_versal_net.c b/drivers/soc/soc_xilinx_versal_net.c
new file mode 100644
index 0000000..146d068
--- /dev/null
+++ b/drivers/soc/soc_xilinx_versal_net.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET SOC driver
+ *
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <soc.h>
+#include <zynqmp_firmware.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#include <linux/bitfield.h>
+
+/*
+ * v1 -> 0x10 - ES1
+ * v2 -> 0x20 - Production
+ */
+static const char versal_family[] = "Versal NET";
+
+struct soc_xilinx_versal_net_priv {
+	const char *family;
+	char revision;
+};
+
+static int soc_xilinx_versal_net_get_family(struct udevice *dev, char *buf, int size)
+{
+	struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev);
+
+	return snprintf(buf, size, "%s", priv->family);
+}
+
+static int soc_xilinx_versal_net_get_revision(struct udevice *dev, char *buf, int size)
+{
+	struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev);
+
+	return snprintf(buf, size, "v%d", priv->revision);
+}
+
+static const struct soc_ops soc_xilinx_versal_net_ops = {
+	.get_family = soc_xilinx_versal_net_get_family,
+	.get_revision = soc_xilinx_versal_net_get_revision,
+};
+
+static int soc_xilinx_versal_net_probe(struct udevice *dev)
+{
+	struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev);
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	priv->family = versal_family;
+
+	if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
+		ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
+					ret_payload);
+		if (ret)
+			return ret;
+	} else {
+		ret_payload[2] = readl(PMC_TAP_VERSION);
+		if (!ret_payload[2])
+			return -EINVAL;
+	}
+
+	priv->revision = FIELD_GET(PS_VERSION_MASK, ret_payload[2]);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(soc_xilinx_versal_net) = {
+	.name		= "soc_xilinx_versal_net",
+	.id		= UCLASS_SOC,
+	.ops		= &soc_xilinx_versal_net_ops,
+	.probe		= soc_xilinx_versal_net_probe,
+	.priv_auto	= sizeof(struct soc_xilinx_versal_net_priv),
+	.flags		= DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c
index a9547a8..e0d5e6b 100644
--- a/drivers/spi/cadence_ospi_versal.c
+++ b/drivers/spi/cadence_ospi_versal.c
@@ -182,11 +182,11 @@ int cadence_qspi_versal_flash_reset(struct udevice *dev)
 
 	/* set direction as output */
 	writel((readl(BOOT_MODE_DIR) | BIT(FLASH_RESET_GPIO)),
-	       BOOT_MODE_POR_0);
+	       BOOT_MODE_DIR);
 
 	/* Data output enable */
 	writel((readl(BOOT_MODE_OUT) | BIT(FLASH_RESET_GPIO)),
-	       BOOT_MODE_POR_1);
+	       BOOT_MODE_OUT);
 
 	/* IOU SLCR write enable */
 	writel(0, WPROT_PMC_MIO);
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 49facc4..48eff77 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -104,7 +104,8 @@
 #define TAP_DLY_BYPASS_LQSPI_RX_VALUE	0x1
 #define TAP_DLY_BYPASS_LQSPI_RX_SHIFT	2
 #define GQSPI_DATA_DLY_ADJ_OFST		0x000001F8
-#define IOU_TAPDLY_BYPASS_OFST !IS_ENABLED(CONFIG_ARCH_VERSAL) ? \
+#define IOU_TAPDLY_BYPASS_OFST !(IS_ENABLED(CONFIG_ARCH_VERSAL) || \
+				 IS_ENABLED(CONFIG_ARCH_VERSAL_NET)) ? \
 				0xFF180390 : 0xF103003C
 #define GQSPI_LPBK_DLY_ADJ_LPBK_MASK	0x00000020
 #define GQSPI_FREQ_37_5MHZ		37500000
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index cbc3647..bb71979 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -18,6 +18,7 @@
 #include <init.h>
 #include <timer.h>
 #include <linux/err.h>
+#include <relocate.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -32,7 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int notrace timer_get_count(struct udevice *dev, u64 *count)
 {
-	const struct timer_ops *ops = device_get_ops(dev);
+	struct timer_ops *ops = timer_get_ops(dev);
 
 	if (!ops->get_count)
 		return -ENOSYS;
@@ -50,6 +51,19 @@ unsigned long notrace timer_get_rate(struct udevice *dev)
 
 static int timer_pre_probe(struct udevice *dev)
 {
+	if (IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) &&
+	    (gd->flags & GD_FLG_RELOC)) {
+		struct timer_ops *ops = timer_get_ops(dev);
+		static int reloc_done;
+
+		if (!reloc_done) {
+			if (ops->get_count)
+				MANUAL_RELOC(ops->get_count);
+
+			reloc_done++;
+		}
+	}
+
 	if (CONFIG_IS_ENABLED(OF_REAL)) {
 		struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 		struct clk timer_clk;
diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c
index 75b4473..172fd9f 100644
--- a/drivers/timer/xilinx-timer.c
+++ b/drivers/timer/xilinx-timer.c
@@ -40,7 +40,7 @@ static u64 xilinx_timer_get_count(struct udevice *dev)
 
 	regmap_read(priv->regs, TIMER_COUNTER_OFFSET, &value);
 
-	return value;
+	return timer_conv_64(value);
 }
 
 static int xilinx_timer_probe(struct udevice *dev)