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| author | Faiz Abbas <faiz_abbas@ti.com> | 2021-02-04 15:10:49 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-02-04 20:37:57 +0530 |
| commit | 5b29fd4a8db22a63f0e7b3ce773e81bf1d855428 (patch) | |
| tree | 8a15f9c4778353fb38e15bf3f48300df3491e314 /drivers | |
| parent | 144e131d47fcc027ae6e9869273f7c8756eb8846 (diff) | |
| download | u-boot-5b29fd4a8db22a63f0e7b3ce773e81bf1d855428.zip u-boot-5b29fd4a8db22a63f0e7b3ce773e81bf1d855428.tar.gz u-boot-5b29fd4a8db22a63f0e7b3ce773e81bf1d855428.tar.bz2 | |
mmc: am654_sdhci: Add flag for PHY calibration
Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB
flag to indicate the same.
Also move the write of trm_icp and driver strength to the set_clock()
function to match the kernel configuration flow.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/am654_sdhci.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index e0136df..1e06541 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -84,6 +84,7 @@ struct am654_sdhci_plat { #define IOMUX_PRESENT BIT(1) #define FREQSEL_2_BIT BIT(2) #define STRBSEL_4_BIT BIT(3) +#define DLL_CALIB BIT(4) }; struct timing_data { @@ -195,6 +196,15 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host) freqsel << FREQSEL_SHIFT); } + /* Configure DLL TRIM */ + mask = DLL_TRIM_ICP_MASK; + val = plat->trm_icp << DLL_TRIM_ICP_SHIFT; + + /* Configure DLL driver strength */ + mask |= DR_TY_MASK; + val |= plat->drv_strength << DR_TY_SHIFT; + regmap_update_bits(plat->base, PHY_CTRL1, mask, val); + /* Enable DLL */ regmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK, 0x1 << ENDLL_SHIFT); @@ -221,7 +231,7 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat) mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; regmap_update_bits(plat->base, PHY_CTRL4, mask, 0x0); - if (plat->flags & DLL_PRESENT) { + if (plat->flags & DLL_CALIB) { regmap_read(plat->base, PHY_STAT1, &val); if (~val & CALDONE_MASK) { /* Calibrate IO lines */ @@ -233,15 +243,6 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat) if (ret) return ret; } - - /* Configure DLL TRIM */ - mask = DLL_TRIM_ICP_MASK; - val = plat->trm_icp << DLL_TRIM_ICP_SHIFT; - - /* Configure DLL driver strength */ - mask |= DR_TY_MASK; - val |= plat->drv_strength << DR_TY_SHIFT; - regmap_update_bits(plat->base, PHY_CTRL1, mask, val); } /* Enable pins by setting IO mux to 0 */ @@ -292,12 +293,13 @@ const struct sdhci_ops am654_sdhci_ops = { const struct am654_driver_data am654_drv_data = { .ops = &am654_sdhci_ops, - .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT, + .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | DLL_CALIB | + STRBSEL_4_BIT, }; const struct am654_driver_data j721e_8bit_drv_data = { .ops = &am654_sdhci_ops, - .flags = DLL_PRESENT, + .flags = DLL_PRESENT | DLL_CALIB, }; static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host) |