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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2021-01-29 12:47:05 +0800 |
---|---|---|
committer | Priyanka Jain <priyanka.jain@nxp.com> | 2021-02-08 14:01:18 +0530 |
commit | 584107337b6fd8701586acbca862ef43f7639d19 (patch) | |
tree | 196519839a743f9c38a4e3b128110ff6c9759558 /drivers | |
parent | fd20097336aa1cbadca9db3cfe7a7681312271bd (diff) | |
download | u-boot-584107337b6fd8701586acbca862ef43f7639d19.zip u-boot-584107337b6fd8701586acbca862ef43f7639d19.tar.gz u-boot-584107337b6fd8701586acbca862ef43f7639d19.tar.bz2 |
pci: layerscape: Remove the shadow SVR definitions
This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pci/pcie_layerscape.h | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h index 0124e8e..8cdf516 100644 --- a/drivers/pci/pcie_layerscape.h +++ b/drivers/pci/pcie_layerscape.h @@ -10,6 +10,8 @@ #include <pci.h> #include <linux/sizes.h> +#include <asm/arch-fsl-layerscape/svr.h> +#include <asm/arch-ls102xa/svr.h> #ifndef CONFIG_SYS_PCI_MEMORY_BUS #define CONFIG_SYS_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE @@ -121,16 +123,6 @@ /* CS2 */ #define PCIE_CS2_OFFSET 0x1000 /* For PCIe without SR-IOV */ -#define SVR_LS102XA 0 -#define SVR_VAR_PER_SHIFT 8 -#define SVR_LS102XA_MASK 0x700 -#define SVR_LS2088A 0x870900 -#define SVR_LS2084A 0x870910 -#define SVR_LS2048A 0x870920 -#define SVR_LS2044A 0x870930 -#define SVR_LS2081A 0x870918 -#define SVR_LS2041A 0x870914 - /* LS1021a PCIE space */ #define LS1021_PCIE_SPACE_OFFSET 0x4000000000ULL #define LS1021_PCIE_SPACE_SIZE 0x0800000000ULL |