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| author | Minda Chen <minda.chen@starfivetech.com> | 2023-07-20 19:37:27 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-08-02 11:02:32 +0800 |
| commit | 309484516576d74e0868ac6399b36e56e9d30a3e (patch) | |
| tree | b8b56966ecd07e6b65f8bb16a6eb524d21472346 /drivers | |
| parent | a6a0d6a19121c722a263714eae4d511bb2580f3c (diff) | |
| download | u-boot-309484516576d74e0868ac6399b36e56e9d30a3e.zip u-boot-309484516576d74e0868ac6399b36e56e9d30a3e.tar.gz u-boot-309484516576d74e0868ac6399b36e56e9d30a3e.tar.bz2 | |
net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V
For RISC-V architeture, hardware maintain the dcache coherency.
Software do not flush the cache. So even cache-line size larger
than descriptor size, driver can work.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/rtl8169.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index dcba515..34e4cff 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -311,10 +311,12 @@ static unsigned char rxdata[RX_BUF_LEN]; * * This can be fixed by defining CONFIG_SYS_NONCACHED_MEMORY which will cause * the driver to allocate descriptors from a pool of non-cached memory. + * + * Hardware maintain D-cache coherency in RISC-V architecture. */ #if RTL8169_DESC_SIZE < ARCH_DMA_MINALIGN #if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \ - !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86) + !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86) && !defined(CONFIG_RISCV) #warning cache-line size is larger than descriptor size #endif #endif |