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authorMarek Vasut <marek.vasut+renesas@gmail.com>2018-06-13 08:02:55 +0200
committerMarek Vasut <marex@denx.de>2018-12-03 12:51:16 +0100
commit59d529afdc869b158ccf2b8c6e3b9bdb41becb8b (patch)
treed93e9c1d9cbe04b1bd746e7822004be14e85efdb /drivers
parent6f8f20f85deeed9be351f8da36f2b38136207063 (diff)
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mmc: tmio: Keep generating clock when clock are enabled
The TMIO core has a feature where it can automatically disable clock output when the bus is not in use. While this is useful, it also interferes with switching the bus to 1.8V and other background tasks of the SD/MMC cards, which require clock to be enabled. This patch respects the mmc->clk_disable and only disables the clock when the MMC core requests it. Otherwise the clock are continuously generated on the bus. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/tmio-common.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index 424b60c..fad2816 100644
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -612,10 +612,16 @@ static void tmio_sd_set_clk_rate(struct tmio_sd_priv *priv,
tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
tmp &= ~TMIO_SD_CLKCTL_DIV_MASK;
- tmp |= val | TMIO_SD_CLKCTL_OFFEN;
+ tmp |= val;
tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
- tmp |= TMIO_SD_CLKCTL_SCLKEN;
+ if (!mmc->clk_disable) {
+ tmp &= ~TMIO_SD_CLKCTL_OFFEN;
+ tmp |= TMIO_SD_CLKCTL_SCLKEN;
+ } else {
+ tmp |= TMIO_SD_CLKCTL_OFFEN;
+ tmp &= ~TMIO_SD_CLKCTL_SCLKEN;
+ }
tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
udelay(1000);