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author | Tom Rini <trini@konsulko.com> | 2021-02-26 12:41:19 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2021-02-26 12:41:19 -0500 |
commit | b839fc9d47bbfc4ab4f0817a03e0e0e25b93e925 (patch) | |
tree | f55e07d4642e0fa931842268c5b000cbb7bcd7e8 /drivers | |
parent | a3c6d287bae38c6b342d6c0940df1f45b5c766a6 (diff) | |
parent | 783a15b35131abc599ec6deca55cf841d2e7c208 (diff) | |
download | u-boot-b839fc9d47bbfc4ab4f0817a03e0e0e25b93e925.zip u-boot-b839fc9d47bbfc4ab4f0817a03e0e0e25b93e925.tar.gz u-boot-b839fc9d47bbfc4ab4f0817a03e0e0e25b93e925.tar.bz2 |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- new GigaDevice flash ids
- fixes for imx, nxp_spi drivers
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mtd/nand/spi/gigadevice.c | 79 | ||||
-rw-r--r-- | drivers/mtd/spi/spi-nor-ids.c | 10 | ||||
-rw-r--r-- | drivers/spi/mxc_spi.c | 5 | ||||
-rw-r--r-- | drivers/spi/nxp_fspi.c | 4 |
4 files changed, 84 insertions, 14 deletions
diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c index 0b228dc..a2c9348 100644 --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c @@ -17,9 +17,22 @@ #define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4) #define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4) -#define GD5FXGQ4XEXXG_REG_STATUS2 0xf0 +#define GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS (1 << 4) +#define GD5FXGQ5XE_STATUS_ECC_4_BITFLIPS (3 << 4) -static SPINAND_OP_VARIANTS(read_cache_variants, +#define GD5FXGQXXEXXG_REG_STATUS2 0xf0 + +/* Q4 devices, QUADIO: Dummy bytes valid for 1 and 2 GBit variants */ +static SPINAND_OP_VARIANTS(gd5fxgq4_read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +/* Q5 devices, QUADIO: Dummy bytes only valid for 1 GBit variants */ +static SPINAND_OP_VARIANTS(gd5f1gq5_read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), @@ -35,7 +48,7 @@ static SPINAND_OP_VARIANTS(update_cache_variants, SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), SPINAND_PROG_LOAD(false, 0, NULL, 0)); -static int gd5fxgq4xexxg_ooblayout_ecc(struct mtd_info *mtd, int section, +static int gd5fxgqxxexxg_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { if (section) @@ -47,7 +60,7 @@ static int gd5fxgq4xexxg_ooblayout_ecc(struct mtd_info *mtd, int section, return 0; } -static int gd5fxgq4xexxg_ooblayout_free(struct mtd_info *mtd, int section, +static int gd5fxgqxxexxg_ooblayout_free(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { if (section) @@ -64,7 +77,7 @@ static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand, u8 status) { u8 status2; - struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4XEXXG_REG_STATUS2, + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2, &status2); int ret; @@ -102,21 +115,67 @@ static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand, return -EINVAL; } -static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = { - .ecc = gd5fxgq4xexxg_ooblayout_ecc, - .rfree = gd5fxgq4xexxg_ooblayout_free, +static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand, + u8 status) +{ + u8 status2; + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2, + &status2); + int ret; + + switch (status & STATUS_ECC_MASK) { + case STATUS_ECC_NO_BITFLIPS: + return 0; + + case GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS: + /* + * Read status2 register to determine a more fine grained + * bit error status + */ + ret = spi_mem_exec_op(spinand->slave, &op); + if (ret) + return ret; + + /* + * 1 ... 4 bits are flipped (and corrected) + */ + /* bits sorted this way (1...0): ECCSE1, ECCSE0 */ + return ((status2 & STATUS_ECC_MASK) >> 4) + 1; + + case STATUS_ECC_UNCOR_ERROR: + return -EBADMSG; + + default: + break; + } + + return -EINVAL; +} + +static const struct mtd_ooblayout_ops gd5fxgqxxexxg_ooblayout = { + .ecc = gd5fxgqxxexxg_ooblayout_ecc, + .rfree = gd5fxgqxxexxg_ooblayout_free, }; static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_INFO("GD5F1GQ4UExxG", 0xd1, NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), NAND_ECCREQ(8, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + SPINAND_INFO_OP_VARIANTS(&gd5fxgq4_read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout, + SPINAND_ECCINFO(&gd5fxgqxxexxg_ooblayout, gd5fxgq4xexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GQ5UExxG", 0x51, + NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&gd5f1gq5_read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&gd5fxgqxxexxg_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), }; static int gigadevice_spinand_detect(struct spinand_device *spinand) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 5bd5dd3..2b57797 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -108,6 +108,11 @@ const struct flash_info spi_nor_ids[] = { SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { + INFO("gd25lq64c", 0xc86017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, + { INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) @@ -319,7 +324,10 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q80bl", 0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q16cl", 0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q64cv", 0xef4017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index bb68eb9..f3dddbd 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -662,7 +662,10 @@ static int mxc_spi_release_bus(struct udevice *dev) static int mxc_spi_set_speed(struct udevice *bus, uint speed) { - /* Nothing to do */ + struct mxc_spi_slave *mxcs = dev_get_plat(bus); + + mxcs->max_hz = speed; + return 0; } diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index 012f304..6c5bad4 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -823,7 +823,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) /* the default frequency, we will change it later if necessary. */ ret = clk_set_rate(&f->clk, 20000000); - if (ret) + if (ret < 0) return ret; ret = nxp_fspi_clk_prep_enable(f); @@ -914,7 +914,7 @@ static int nxp_fspi_set_speed(struct udevice *bus, uint speed) nxp_fspi_clk_disable_unprep(f); ret = clk_set_rate(&f->clk, speed); - if (ret) + if (ret < 0) return ret; ret = nxp_fspi_clk_prep_enable(f); |