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author | Marek Vasut <marex@denx.de> | 2021-09-14 20:28:24 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-09-28 12:03:21 -0400 |
commit | b81ce79df091834430dce72f0e4d1451f25fc8f7 (patch) | |
tree | 007ede98dba7a6c3a9d1eda53a3b849a729b381d /drivers | |
parent | a4f2d83414557f2ad7b63d537e2c31790d0f184d (diff) | |
download | u-boot-b81ce79df091834430dce72f0e4d1451f25fc8f7.zip u-boot-b81ce79df091834430dce72f0e4d1451f25fc8f7.tar.gz u-boot-b81ce79df091834430dce72f0e4d1451f25fc8f7.tar.bz2 |
mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0
Before e2e95e5e254 ("spi: Update speed/mode on change") most systems
silently defaulted to SF bus mode 0. Now the mode is always updated,
which causes breakage. It seems most SF which are used as boot media
operate in bus mode 0, so switch that as the default.
This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx
ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble
with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked
as those might need mode 3.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Cc: Andreas Biessmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mtd/spi/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index b2291f7..f03fe05 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -57,7 +57,7 @@ config SF_DEFAULT_CS config SF_DEFAULT_MODE hex "SPI Flash default mode (see include/spi.h)" depends on SPI_FLASH || DM_SPI_FLASH - default 3 + default 0 help The default mode may be provided by the platform to handle the common case when only a single serial |