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authorT Karthik Reddy <t.karthik.reddy@xilinx.com>2022-11-23 02:04:51 -0700
committerMichal Simek <michal.simek@amd.com>2022-12-05 08:55:54 +0100
commita5e770b21ccc4d3ffc5cf50cab481cb0e35ee6ce (patch)
treea57ba961198686019431e10a9c08065c588b8337 /drivers
parentd9efdc7d424ddfdc2aafeee4268435f9f46dd1db (diff)
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spi: zynqmp_gqspi: Update tapdelay value
The driver was using an incorrect value for GQSPI_LPBK_DLY_ADJ_DLY_1 tapdelay for Versal for frequencies above 100MHz. Change it from 2 to 1 based on the recommended value in IP spec. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20221123090451.11409-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/zynqmp_gqspi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 48eff77..83a5c8a 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -94,7 +94,7 @@
#define GQSPI_BAUD_DIV_SHIFT 2
#define GQSPI_LPBK_DLY_ADJ_LPBK_SHIFT 5
-#define GQSPI_LPBK_DLY_ADJ_DLY_1 0x2
+#define GQSPI_LPBK_DLY_ADJ_DLY_1 0x1
#define GQSPI_LPBK_DLY_ADJ_DLY_1_SHIFT 3
#define GQSPI_LPBK_DLY_ADJ_DLY_0 0x3
#define GQSPI_USE_DATA_DLY 0x1