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| author | Stefan Roese <sr@denx.de> | 2020-11-16 18:02:30 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-27 08:25:31 -0500 |
| commit | 14807449a4a04fa478c5aba2142b6c157cfcfe4b (patch) | |
| tree | e56546c42fce768dab86313edc5daae6899aefd8 /drivers | |
| parent | 919c8ede869caeb1a60fb596e759a2bf74030801 (diff) | |
| download | u-boot-14807449a4a04fa478c5aba2142b6c157cfcfe4b.zip u-boot-14807449a4a04fa478c5aba2142b6c157cfcfe4b.tar.gz u-boot-14807449a4a04fa478c5aba2142b6c157cfcfe4b.tar.bz2 | |
net: e1000: Add missing address translations
Add some missing address translations from virtual address in local DRAM
to physical address, which is needed for the DMA transactions to work
correctly.
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/e1000.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 6d6bf8c..694114e 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -5141,7 +5141,7 @@ fill_rx(struct e1000_hw *hw) rd = rx_base + rx_tail; rx_tail = (rx_tail + 1) % 8; memset(rd, 0, 16); - rd->buffer_addr = cpu_to_le64((unsigned long)packet); + rd->buffer_addr = cpu_to_le64(virt_to_phys(packet)); /* * Make sure there are no stale data in WB over this area, which @@ -5172,8 +5172,8 @@ e1000_configure_tx(struct e1000_hw *hw) unsigned long tipg, tarc; uint32_t ipgr1, ipgr2; - E1000_WRITE_REG(hw, TDBAL, lower_32_bits((unsigned long)tx_base)); - E1000_WRITE_REG(hw, TDBAH, upper_32_bits((unsigned long)tx_base)); + E1000_WRITE_REG(hw, TDBAL, lower_32_bits(virt_to_phys(tx_base))); + E1000_WRITE_REG(hw, TDBAH, upper_32_bits(virt_to_phys(tx_base))); E1000_WRITE_REG(hw, TDLEN, 128); @@ -5317,8 +5317,8 @@ e1000_configure_rx(struct e1000_hw *hw) E1000_WRITE_FLUSH(hw); } /* Setup the Base and Length of the Rx Descriptor Ring */ - E1000_WRITE_REG(hw, RDBAL, lower_32_bits((unsigned long)rx_base)); - E1000_WRITE_REG(hw, RDBAH, upper_32_bits((unsigned long)rx_base)); + E1000_WRITE_REG(hw, RDBAL, lower_32_bits(virt_to_phys(rx_base))); + E1000_WRITE_REG(hw, RDBAH, upper_32_bits(virt_to_phys(rx_base))); E1000_WRITE_REG(hw, RDLEN, 128); |