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authorPratyush Yadav <p.yadav@ti.com>2021-06-26 00:47:22 +0530
committerJagan Teki <jagan@amarulasolutions.com>2021-06-28 12:04:09 +0530
commitb058f108d7d91f9a5f47c1d0d3ddf4e6ae030440 (patch)
tree3cc97af664187c128a6ccde9ceddb63a25a1147c /drivers/w1/mxc_w1.c
parent6b808e0864dbd492d33e7149fb1666bef7e56049 (diff)
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mtd: spi-nor-core: Do not make invalid quad enable fatal
The Micron MT35XU512ABA flash does not support the quad enable bit. But instead of programming the Quad Enable Require field to 000b ("Device does not have a QE bit"), it is programmed to 111b ("Reserved"). While this is technically incorrect, it is not reason enough to abort BFPT parsing. Instead, continue BFPT parsing assuming there is no quad enable bit present. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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