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authorPali Rohár <pali@kernel.org>2021-02-07 14:50:09 +0100
committerMarek Vasut <marex@denx.de>2021-03-03 04:12:46 +0100
commitf1e8d2072cb5a87703f21e1492da0fa247c2c2e2 (patch)
treea271e04fd6cf5982ffea0a75c1dcb38ec17a96be /drivers/usb
parentff77bb301eb77a49409a8c113b02b0048f9f809d (diff)
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usb: musb: Fix handling interrupts for EP0 and SET ADDRESS commmand
Interrupt for EP0 is indicated in intrtx register via first bit. This bit is set for both RX and TX despite register has only TX in its name. First bit in intrrx register is reserved, not used and never set. So remove calling musb_peri_ep0() function at every iteration of udc_irq() and musb_peri_rx() and call it only from musb_peri_tx() when correct interrupt bit in initrtx it set. Address from SET ADDRESS command must be set to faddr register only after acknowledging SERV_RXPKTRDY followed by received EP0 interrupt. So prior calling musb_peri_ep0_set_address() check for EP0 interrupt instead of (incorrect) MUSB_INTR_SOF interrupt. This patch fixes issue that host (computer) cannot register U-Boot USB device and is failing with errors: usb 1-1: new full-speed USB device number 86 using xhci_hcd usb 1-1: Device not responding to setup address. usb 1-1: Device not responding to setup address. usb 1-1: device not accepting address 86, error -71 U-Boot was writing address to faddr register too early and did not wait for correct interrupt after which should update address. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/musb/musb_udc.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index 41fff94..8d48056 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -707,9 +707,7 @@ static void musb_peri_rx(u16 intr)
{
unsigned int ep;
- /* Check for EP0 */
- if (0x01 & intr)
- musb_peri_ep0();
+ /* First bit is reserved and does not indicate interrupt for EP0 */
for (ep = 1; ep < 16; ep++) {
if ((1 << ep) & intr)
@@ -721,9 +719,9 @@ static void musb_peri_tx(u16 intr)
{
unsigned int ep;
- /* Check for EP0 */
+ /* Check for EP0: first bit indicates interrupt for both RX and TX */
if (0x01 & intr)
- musb_peri_ep0_tx();
+ musb_peri_ep0();
for (ep = 1; ep < 16; ep++) {
if ((1 << ep) & intr)
@@ -750,8 +748,6 @@ void udc_irq(void)
musb_peri_resume();
}
- musb_peri_ep0();
-
if (MUSB_INTR_RESET & intrusb) {
usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
musb_peri_reset();
@@ -790,7 +786,7 @@ void udc_irq(void)
if (intrtx)
musb_peri_tx(intrtx);
} else {
- if (MUSB_INTR_SOF & intrusb) {
+ if (readw(&musbr->intrtx) & 0x1) {
u8 faddr;
faddr = readb(&musbr->faddr);
/*