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| author | Sean Anderson <seanga2@gmail.com> | 2020-09-28 10:52:22 -0400 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-09-30 08:54:45 +0800 |
| commit | 3576121687965ffe580fc44f5dd1d8e9ab434c5b (patch) | |
| tree | 7c9b33bba348375cd647da2f7f03891b34b9622e /drivers/timer | |
| parent | c33efafaf949ef11fc525cd5be018ea48c40898c (diff) | |
| download | u-boot-3576121687965ffe580fc44f5dd1d8e9ab434c5b.zip u-boot-3576121687965ffe580fc44f5dd1d8e9ab434c5b.tar.gz u-boot-3576121687965ffe580fc44f5dd1d8e9ab434c5b.tar.bz2 | |
timer: Add helper for drivers using timebase fallback
This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
timebase-frequency.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'drivers/timer')
| -rw-r--r-- | drivers/timer/timer-uclass.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 14dde95..e9802c8 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <cpu.h> #include <dm.h> #include <init.h> #include <dm/lists.h> @@ -79,6 +80,36 @@ static int timer_post_probe(struct udevice *dev) return 0; } +/* + * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on + * the end... + */ +#if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT) +int timer_timebase_fallback(struct udevice *dev) +{ + struct udevice *cpu; + struct cpu_platdata *cpu_plat; + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + /* Did we get our clock rate from the device tree? */ + if (uc_priv->clock_rate) + return 0; + + /* Fall back to timebase-frequency */ + dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n"); + cpu = cpu_get_current_dev(); + if (!cpu) + return -ENODEV; + + cpu_plat = dev_get_parent_platdata(cpu); + if (!cpu_plat) + return -ENODEV; + + uc_priv->clock_rate = cpu_plat->timebase_freq; + return 0; +} +#endif + u64 timer_conv_64(u32 count) { /* increment tbh if tbl has rolled over */ |