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| author | Tom Rini <trini@konsulko.com> | 2018-06-13 11:43:59 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-06-13 11:43:59 -0400 |
| commit | 66398944f53921ec641e1c2202390933767dbb87 (patch) | |
| tree | e68f31898efc1f8963bcd37cb6703a61a9c5f76f /drivers/timer/tsc_timer.c | |
| parent | acaee30608ce203289a180d664b7f0abb2e64ee7 (diff) | |
| parent | bee053e248e93d82e5c352708f8c892f4a488c54 (diff) | |
| download | u-boot-66398944f53921ec641e1c2202390933767dbb87.zip u-boot-66398944f53921ec641e1c2202390933767dbb87.tar.gz u-boot-66398944f53921ec641e1c2202390933767dbb87.tar.bz2 | |
Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'drivers/timer/tsc_timer.c')
| -rw-r--r-- | drivers/timer/tsc_timer.c | 29 |
1 files changed, 24 insertions, 5 deletions
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index c7fefd2..cf86999 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -21,6 +21,17 @@ DECLARE_GLOBAL_DATA_PTR; +static unsigned long cpu_mhz_from_cpuid(void) +{ + if (gd->arch.x86_vendor != X86_VENDOR_INTEL) + return 0; + + if (cpuid_eax(0) < 0x16) + return 0; + + return cpuid_eax(0x16); +} + /* * According to Intel 64 and IA-32 System Programming Guide, * if MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be @@ -343,13 +354,21 @@ static void tsc_timer_ensure_setup(void) if (!gd->arch.clock_rate) { unsigned long fast_calibrate; + fast_calibrate = cpu_mhz_from_cpuid(); + if (fast_calibrate) + goto done; + fast_calibrate = cpu_mhz_from_msr(); - if (!fast_calibrate) { - fast_calibrate = quick_pit_calibrate(); - if (!fast_calibrate) - panic("TSC frequency is ZERO"); - } + if (fast_calibrate) + goto done; + + fast_calibrate = quick_pit_calibrate(); + if (fast_calibrate) + goto done; + + panic("TSC frequency is ZERO"); +done: gd->arch.clock_rate = fast_calibrate * 1000000; } } |