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author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | 2024-03-04 08:40:42 +0530 |
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committer | Tom Rini <trini@konsulko.com> | 2024-05-24 09:10:42 -0600 |
commit | b1ac6e0e4f67eef847acdc338f047aa8a541f18d (patch) | |
tree | 2d19f1ba60f6c0f3a6e6ae71adeda3172c742c22 /drivers/spi/spi-sifive.c | |
parent | 4afbc5766712ea9f66505f9059c99dabc2dca18e (diff) | |
download | u-boot-b1ac6e0e4f67eef847acdc338f047aa8a541f18d.zip u-boot-b1ac6e0e4f67eef847acdc338f047aa8a541f18d.tar.gz u-boot-b1ac6e0e4f67eef847acdc338f047aa8a541f18d.tar.bz2 |
spi: spi-uclass: Read chipselect and restrict capabilities
Read chipselect properties from DT which are populated using 'reg'
property and save it in plat->cs[] array for later use.
Also read multi chipselect capability which is used for
parallel-memories and return errors if they are passed on using DT but
driver is not capable of handling it.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Diffstat (limited to 'drivers/spi/spi-sifive.c')
-rw-r--r-- | drivers/spi/spi-sifive.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index ea372a0..43904d7 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -109,13 +109,13 @@ static void sifive_spi_prep_device(struct sifive_spi *spi, { /* Update the chip select polarity */ if (slave_plat->mode & SPI_CS_HIGH) - spi->cs_inactive &= ~BIT(slave_plat->cs); + spi->cs_inactive &= ~BIT(slave_plat->cs[0]); else - spi->cs_inactive |= BIT(slave_plat->cs); + spi->cs_inactive |= BIT(slave_plat->cs[0]); writel(spi->cs_inactive, spi->regs + SIFIVE_SPI_REG_CSDEF); /* Select the correct device */ - writel(slave_plat->cs, spi->regs + SIFIVE_SPI_REG_CSID); + writel(slave_plat->cs[0], spi->regs + SIFIVE_SPI_REG_CSID); } static int sifive_spi_set_cs(struct sifive_spi *spi, |