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| author | Jason Rush <jarush@gmail.com> | 2018-01-23 17:13:09 -0600 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-01-24 12:07:50 +0530 |
| commit | 15a70a5da33229de884f60684a562ea60fe505b2 (patch) | |
| tree | f919d523935de1b6f0548356b49ae27ee77b9cd1 /drivers/spi/cadence_qspi.c | |
| parent | df16881cea50a787c37591bd2168c8ea656217bd (diff) | |
| download | u-boot-15a70a5da33229de884f60684a562ea60fe505b2.zip u-boot-15a70a5da33229de884f60684a562ea60fe505b2.tar.gz u-boot-15a70a5da33229de884f60684a562ea60fe505b2.tar.bz2 | |
spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.
Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>
Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/spi/cadence_qspi.c')
| -rw-r--r-- | drivers/spi/cadence_qspi.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 9a6e41f..7b312f8 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -212,7 +212,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen, /* Set Chip select */ cadence_qspi_apb_chipselect(base, spi_chip_select(dev), - CONFIG_CQSPI_DECODER); + plat->is_decoded_cs); if ((flags & SPI_XFER_END) || (flags == 0)) { if (priv->cmd_len == 0) { @@ -296,7 +296,11 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) plat->regbase = (void *)data[0]; plat->ahbbase = (void *)data[2]; - plat->sram_size = fdtdec_get_int(blob, node, "sram-size", 128); + plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs"); + plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128); + plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4); + plat->trigger_address = fdtdec_get_uint(blob, node, + "cdns,trigger-address", 0); /* All other paramters are embedded in the child node */ subnode = fdt_first_subnode(blob, node); @@ -310,12 +314,12 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) 500000); /* Read other parameters from DT */ - plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256); - plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16); - plat->tshsl_ns = fdtdec_get_int(blob, subnode, "tshsl-ns", 200); - plat->tsd2d_ns = fdtdec_get_int(blob, subnode, "tsd2d-ns", 255); - plat->tchsh_ns = fdtdec_get_int(blob, subnode, "tchsh-ns", 20); - plat->tslch_ns = fdtdec_get_int(blob, subnode, "tslch-ns", 20); + plat->page_size = fdtdec_get_uint(blob, subnode, "page-size", 256); + plat->block_size = fdtdec_get_uint(blob, subnode, "block-size", 16); + plat->tshsl_ns = fdtdec_get_uint(blob, subnode, "cdns,tshsl-ns", 200); + plat->tsd2d_ns = fdtdec_get_uint(blob, subnode, "cdns,tsd2d-ns", 255); + plat->tchsh_ns = fdtdec_get_uint(blob, subnode, "cdns,tchsh-ns", 20); + plat->tslch_ns = fdtdec_get_uint(blob, subnode, "cdns,tslch-ns", 20); debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", __func__, plat->regbase, plat->ahbbase, plat->max_hz, |