diff options
| author | Sumit Garg <sumit.garg@linaro.org> | 2024-04-12 15:24:34 +0530 |
|---|---|---|
| committer | Caleb Connolly <caleb.connolly@linaro.org> | 2024-04-23 13:29:23 +0200 |
| commit | 512672492ccf09adb98e185243f2edace54e3ef4 (patch) | |
| tree | 0ef22cb963ff988925e1e9e06967513c184c0b1e /drivers/serial | |
| parent | 6e992a6bc85ce40a9b24924db52ce90c9efc3005 (diff) | |
| download | u-boot-512672492ccf09adb98e185243f2edace54e3ef4.zip u-boot-512672492ccf09adb98e185243f2edace54e3ef4.tar.gz u-boot-512672492ccf09adb98e185243f2edace54e3ef4.tar.bz2 | |
serial_msm: Enable RS232 flow control
SE HMIBSC board debug console requires RS232 flow control, so enable
corresponding support if RS232 gpios are present.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_msm.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index 06a948a..a472e0b 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -63,9 +63,10 @@ #define UARTDM_TF 0x100 /* UART Transmit FIFO register */ #define UARTDM_RF 0x140 /* UART Receive FIFO register */ -#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 -#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 -#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 +#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 +#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 +#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 +#define MSM_UART_MR1_RX_RDY_CTL BIT(7) DECLARE_GLOBAL_DATA_PTR; @@ -220,7 +221,8 @@ static void uart_dm_init(struct msm_serial_data *priv) } writel(bitrate, priv->base + UARTDM_CSR); - writel(0x0, priv->base + UARTDM_MR1); + /* Enable RS232 flow control to support RS232 db9 connector */ + writel(MSM_UART_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1); writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR); |