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| author | Simon Glass <sjg@chromium.org> | 2023-09-26 08:14:58 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-10-06 14:38:13 -0400 |
| commit | f69d3d6d10b15872a279aeb10b7c522627aff6c2 (patch) | |
| tree | fcabaf4a86164f385ede03b654bc69cbffb2a3ee /drivers/serial/ns16550.c | |
| parent | 61fc132051740e0378a5e71f3db6cb1581e970fe (diff) | |
| download | u-boot-f69d3d6d10b15872a279aeb10b7c522627aff6c2.zip u-boot-f69d3d6d10b15872a279aeb10b7c522627aff6c2.tar.gz u-boot-f69d3d6d10b15872a279aeb10b7c522627aff6c2.tar.bz2 | |
pci: serial: Support reading PCI-register size with baseWIP/2023-10-06-spl-prepare-for-universal-payload
The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.
Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.
A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial/ns16550.c')
| -rw-r--r-- | drivers/serial/ns16550.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 5ca2828..6deb1d8 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -484,6 +484,7 @@ static int ns16550_serial_getinfo(struct udevice *dev, info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY; #endif info->addr = plat->base; + info->size = plat->size; info->reg_width = plat->reg_width; info->reg_shift = plat->reg_shift; info->reg_offset = plat->reg_offset; @@ -492,7 +493,8 @@ static int ns16550_serial_getinfo(struct udevice *dev, return 0; } -static int ns16550_serial_assign_base(struct ns16550_plat *plat, fdt_addr_t base) +static int ns16550_serial_assign_base(struct ns16550_plat *plat, + fdt_addr_t base, fdt_size_t size) { if (base == FDT_ADDR_T_NONE) return -EINVAL; @@ -502,6 +504,7 @@ static int ns16550_serial_assign_base(struct ns16550_plat *plat, fdt_addr_t base #else plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE); #endif + plat->size = size; return 0; } @@ -512,6 +515,7 @@ int ns16550_serial_probe(struct udevice *dev) struct ns16550 *const com_port = dev_get_priv(dev); struct reset_ctl_bulk reset_bulk; fdt_addr_t addr; + fdt_addr_t size; int ret; /* @@ -519,8 +523,8 @@ int ns16550_serial_probe(struct udevice *dev) * or via a PCI bridge, assign plat->base before probing hardware. */ if (device_is_on_pci_bus(dev)) { - addr = devfdt_get_addr_pci(dev); - ret = ns16550_serial_assign_base(plat, addr); + addr = devfdt_get_addr_pci(dev, &size); + ret = ns16550_serial_assign_base(plat, addr, size); if (ret) return ret; } @@ -547,12 +551,14 @@ int ns16550_serial_of_to_plat(struct udevice *dev) { struct ns16550_plat *plat = dev_get_plat(dev); const u32 port_type = dev_get_driver_data(dev); + fdt_size_t size = 0; fdt_addr_t addr; struct clk clk; int err; - addr = dev_read_addr(dev); - err = ns16550_serial_assign_base(plat, addr); + addr = spl_in_proper() ? dev_read_addr_size(dev, &size) : + dev_read_addr(dev); + err = ns16550_serial_assign_base(plat, addr, size); if (err && !device_is_on_pci_bus(dev)) return err; |