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authorPatrice Chotard <patrice.chotard@st.com>2017-09-13 18:00:07 +0200
committerTom Rini <trini@konsulko.com>2017-09-22 07:40:01 -0400
commit23a06416858d839ee62dc00562be956be6d84bd2 (patch)
tree3f8dafb28f143f6aa391ef7cc24b4ea5206fb529 /drivers/reset
parent4c3aebd56a035740f04fce44ce6c398afbb5ad86 (diff)
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dm: reset: add stm32 reset driver
This driver is adapted from linux drivers/reset/reset-stm32.c It's compatible with STM32 F4/F7/H7 SoCs. This driver doesn't implement .of_match as it's binded by MFD RCC driver. To add support for each SoC family, a SoC's specific include/dt-binfings/mfd/stm32xx-rcc.h file must be added. This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs. Other SoCs support will be added in the future. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/reset')
-rw-r--r--drivers/reset/Kconfig7
-rw-r--r--drivers/reset/Makefile1
-rw-r--r--drivers/reset/stm32-reset.c80
3 files changed, 88 insertions, 0 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index e6af7da..ce46e27 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -28,6 +28,13 @@ config STI_RESET
Say Y if you want to control reset signals provided by system config
block.
+config STM32_RESET
+ bool "Enable the STM32 reset"
+ depends on STM32
+ help
+ Support for reset controllers on STMicroelectronics STM32 family SoCs.
+ This resset driver is compatible with STM32 F4/F7 and H7 SoCs.
+
config TEGRA_CAR_RESET
bool "Enable Tegra CAR-based reset driver"
depends on TEGRA_CAR
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index d5e06c2..252cefe 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DM_RESET) += reset-uclass.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
obj-$(CONFIG_STI_RESET) += sti-reset.o
+obj-$(CONFIG_STM32_RESET) += stm32-reset.o
obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
new file mode 100644
index 0000000..9c627d8
--- /dev/null
+++ b/drivers/reset/stm32-reset.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <reset-uclass.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct stm32_reset_priv {
+ fdt_addr_t base;
+};
+
+static int stm32_reset_request(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static int stm32_reset_free(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static int stm32_reset_assert(struct reset_ctl *reset_ctl)
+{
+ struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
+ int offset = reset_ctl->id % BITS_PER_LONG;
+ debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
+ reset_ctl->id, bank, offset);
+
+ setbits_le32(priv->base + bank, BIT(offset));
+
+ return 0;
+}
+
+static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
+{
+ struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
+ int offset = reset_ctl->id % BITS_PER_LONG;
+ debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
+ reset_ctl->id, bank, offset);
+
+ clrbits_le32(priv->base + bank, BIT(offset));
+
+ return 0;
+}
+
+static const struct reset_ops stm32_reset_ops = {
+ .request = stm32_reset_request,
+ .free = stm32_reset_free,
+ .rst_assert = stm32_reset_assert,
+ .rst_deassert = stm32_reset_deassert,
+};
+
+static int stm32_reset_probe(struct udevice *dev)
+{
+ struct stm32_reset_priv *priv = dev_get_priv(dev);
+
+ priv->base = devfdt_get_addr(dev);
+ if (priv->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(stm32_rcc_reset) = {
+ .name = "stm32_rcc_reset",
+ .id = UCLASS_RESET,
+ .probe = stm32_reset_probe,
+ .priv_auto_alloc_size = sizeof(struct stm32_reset_priv),
+ .ops = &stm32_reset_ops,
+};