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| author | Minda Chen <minda.chen@starfivetech.com> | 2023-07-20 19:37:27 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-08-02 11:02:32 +0800 |
| commit | 309484516576d74e0868ac6399b36e56e9d30a3e (patch) | |
| tree | b8b56966ecd07e6b65f8bb16a6eb524d21472346 /drivers/reset/stm32-reset.c | |
| parent | a6a0d6a19121c722a263714eae4d511bb2580f3c (diff) | |
| download | u-boot-309484516576d74e0868ac6399b36e56e9d30a3e.zip u-boot-309484516576d74e0868ac6399b36e56e9d30a3e.tar.gz u-boot-309484516576d74e0868ac6399b36e56e9d30a3e.tar.bz2 | |
net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V
For RISC-V architeture, hardware maintain the dcache coherency.
Software do not flush the cache. So even cache-line size larger
than descriptor size, driver can work.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'drivers/reset/stm32-reset.c')
0 files changed, 0 insertions, 0 deletions