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| author | Jagan Teki <jagan@amarulasolutions.com> | 2019-07-16 17:27:05 +0530 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 23:59:44 +0800 |
| commit | ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26 (patch) | |
| tree | 8f8d68058f52b3f4c45af86fd7e24f477efb9bc9 /drivers/ram | |
| parent | b713e0291ba90847058678ae2752f08f238c8fe3 (diff) | |
| download | u-boot-ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26.zip u-boot-ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26.tar.gz u-boot-ed77ce728aa2cd2c8b1c01ec3a0f2efb8f3edc26.tar.bz2 | |
ram: rk3399: Add ddrtimingC0
Add DdrTimingC0 structure with associated bit fields.
These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/ram')
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3399.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 7502199..d47e290 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1110,7 +1110,7 @@ static void dram_all_config(struct dram_info *dram, &ddr_msch_regs->ddrtiminga0); writel(noc_timing->ddrtimingb0, &ddr_msch_regs->ddrtimingb0); - writel(noc_timing->ddrtimingc0, + writel(noc_timing->ddrtimingc0.d32, &ddr_msch_regs->ddrtimingc0); writel(noc_timing->devtodev0, &ddr_msch_regs->devtodev0); |