diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2019-07-16 17:27:27 +0530 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 23:59:44 +0800 |
| commit | 274c33737bcb49d9120ea222ba1a434d3fdca1c7 (patch) | |
| tree | 3543805a7168c033290c08759e796c7b7bc469c8 /drivers/ram | |
| parent | 95be76eb5ce0d807d5b1b360efbac11f16a819af (diff) | |
| download | u-boot-274c33737bcb49d9120ea222ba1a434d3fdca1c7.zip u-boot-274c33737bcb49d9120ea222ba1a434d3fdca1c7.tar.gz u-boot-274c33737bcb49d9120ea222ba1a434d3fdca1c7.tar.bz2 | |
ram: rk3399: Update lpddr4 mode_sel based on io settings
The mode_sel on lpddr4 value is depending on IO settings
of rd_vref.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Diffstat (limited to 'drivers/ram')
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3399.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index e1e7531..84a09fe 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -347,7 +347,7 @@ static int phy_io_config(const struct chan_info *chan, u32 drv_value, odt_value; u32 speed; - /* vref setting */ + /* vref setting & mode setting */ if (params->base.dramtype == LPDDR4) { struct io_setting *io = lpddr4_get_io_settings(params, mr5); u32 rd_vref = io->rd_vref * 1000; @@ -355,15 +355,18 @@ static int phy_io_config(const struct chan_info *chan, if (rd_vref < 36700) { /* MODE_LV[2:0] = LPDDR4 (Range 2)*/ vref_mode_dq = 0x7; + /* MODE[2:0]= LPDDR4 Range 2(0.4*VDDQ) */ + mode_sel = 0x5; vref_value_dq = (rd_vref - 3300) / 521; } else { /* MODE_LV[2:0] = LPDDR4 (Range 1)*/ vref_mode_dq = 0x6; + /* MODE[2:0]= LPDDR4 Range 1(0.33*VDDQ) */ + mode_sel = 0x4; vref_value_dq = (rd_vref - 15300) / 521; } vref_mode_ac = 0x6; vref_value_ac = 0x1f; - mode_sel = 0x6; } else if (params->base.dramtype == LPDDR3) { if (params->base.odt == 1) { vref_mode_dq = 0x5; /* LPDDR3 ODT */ |