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| author | Igal Liberman <igall@marvell.com> | 2018-05-09 18:50:29 +0300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2021-04-29 07:45:24 +0200 |
| commit | 5f41aaf4c3e727bb5a0421c8b9e14548267dccee (patch) | |
| tree | 5962d8f597c7ac999767fbcce6c6de52e6d6ad25 /drivers/phy/marvell | |
| parent | cd2caff77f464d381216762fd91c79a86886022c (diff) | |
| download | u-boot-5f41aaf4c3e727bb5a0421c8b9e14548267dccee.zip u-boot-5f41aaf4c3e727bb5a0421c8b9e14548267dccee.tar.gz u-boot-5f41aaf4c3e727bb5a0421c8b9e14548267dccee.tar.bz2 | |
phy: marvell: pass sgmii id to firmware
Currently, we don't pass id for SGMII 0/1.
A bug in comphy selector configuration was found (in comphy
firmware), after fixing it, SGMII0/1 have different configuration,
so we need to pass the ID the firmware.
Change-Id: Idcff4029cc9cf018278e493221b64b33574e0d38
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Diffstat (limited to 'drivers/phy/marvell')
| -rw-r--r-- | drivers/phy/marvell/comphy_cp110.c | 27 |
1 files changed, 5 insertions, 22 deletions
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c index 2a22a67..5520288 100644 --- a/drivers/phy/marvell/comphy_cp110.c +++ b/drivers/phy/marvell/comphy_cp110.c @@ -522,7 +522,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, { struct comphy_map *ptr_comphy_map; void __iomem *comphy_base_addr, *hpipe_base_addr; - u32 comphy_max_count, lane, ret = 0; + u32 comphy_max_count, lane, id, ret = 0; u32 pcie_width = 0; u32 mode; @@ -591,34 +591,17 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, break; case COMPHY_TYPE_SGMII0: case COMPHY_TYPE_SGMII1: - if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) { - debug("Warning: "); - debug("SGMII PHY speed in lane %d is invalid,", - lane); - debug(" set PHY speed to 1.25G\n"); - ptr_comphy_map->speed = COMPHY_SPEED_1_25G; - } - - /* - * UINIT_ID not relevant for SGMII0 and SGMII1 - will be - * ignored by firmware - */ - mode = COMPHY_FW_FORMAT(COMPHY_SGMII_MODE, - COMPHY_UNIT_ID0, - ptr_comphy_map->speed); - ret = comphy_smc(MV_SIP_COMPHY_POWER_ON, - ptr_chip_cfg->comphy_base_addr, lane, - mode); - break; case COMPHY_TYPE_SGMII2: + /* Calculate SGMII ID */ + id = ptr_comphy_map->type - COMPHY_TYPE_SGMII0; + if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) { debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n", lane); ptr_comphy_map->speed = COMPHY_SPEED_1_25G; } - mode = COMPHY_FW_FORMAT(COMPHY_SGMII_MODE, - COMPHY_UNIT_ID2, + mode = COMPHY_FW_FORMAT(COMPHY_SGMII_MODE, id, ptr_comphy_map->speed); ret = comphy_smc(MV_SIP_COMPHY_POWER_ON, ptr_chip_cfg->comphy_base_addr, lane, |