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author | Ramon Fried <ramon.fried@gmail.com> | 2019-04-27 11:15:22 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2019-07-11 10:05:15 -0400 |
commit | c2ccc9e5cb9ac5547e063bc2bf35f6340b8f9362 (patch) | |
tree | 6ce71088d3d1aeaa68c5051011bdf766b2969b45 /drivers/pci_endpoint/Kconfig | |
parent | 914026d25848b856a669d629cb284c34843d707e (diff) | |
download | u-boot-c2ccc9e5cb9ac5547e063bc2bf35f6340b8f9362.zip u-boot-c2ccc9e5cb9ac5547e063bc2bf35f6340b8f9362.tar.gz u-boot-c2ccc9e5cb9ac5547e063bc2bf35f6340b8f9362.tar.bz2 |
pci_ep: add Cadence PCIe endpoint driver
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pci_endpoint/Kconfig')
-rw-r--r-- | drivers/pci_endpoint/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci_endpoint/Kconfig b/drivers/pci_endpoint/Kconfig index ac4f43d..e00cb75 100644 --- a/drivers/pci_endpoint/Kconfig +++ b/drivers/pci_endpoint/Kconfig @@ -14,4 +14,12 @@ config PCI_ENDPOINT controllers that can operate in endpoint mode (as a device connected to PCI host or bridge). +config PCIE_CADENCE_EP + bool "Cadence PCIe endpoint controller" + depends on PCI_ENDPOINT + help + Say Y here if you want to support the Cadence PCIe controller in + endpoint mode. This PCIe controller may be embedded into many + different vendors SoCs. + endmenu |