diff options
| author | Weijie Gao <weijie.gao@mediatek.com> | 2022-05-20 11:23:42 +0800 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2022-07-13 23:03:37 +0200 |
| commit | ad80d48979d8a58f71ea780bdbdedd83f3c77467 (patch) | |
| tree | 5cd83b1e0e7ec3193772a7287061f303b6f9a4d3 /drivers/net | |
| parent | 86062e7a5deb8b32112f6c05403b6a2e5d9f1853 (diff) | |
| download | u-boot-ad80d48979d8a58f71ea780bdbdedd83f3c77467.zip u-boot-ad80d48979d8a58f71ea780bdbdedd83f3c77467.tar.gz u-boot-ad80d48979d8a58f71ea780bdbdedd83f3c77467.tar.bz2 | |
net: mediatek: add support for MediaTek MT7621 SoC
This patch adds GMAC support for MediaTek MT7621 SoC.
MT7621 has the same GMAC/Switch configuration as MT7623.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/mtk_eth.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c index ac1e8ab..4fe7ee0 100644 --- a/drivers/net/mtk_eth.c +++ b/drivers/net/mtk_eth.c @@ -145,7 +145,8 @@ enum mtk_switch { enum mtk_soc { SOC_MT7623, SOC_MT7629, - SOC_MT7622 + SOC_MT7622, + SOC_MT7621 }; struct mtk_eth_priv { @@ -675,12 +676,18 @@ static int mt7530_pad_clk_setup(struct mtk_eth_priv *priv, int mode) static int mt7530_setup(struct mtk_eth_priv *priv) { u16 phy_addr, phy_val; - u32 val; + u32 val, txdrv; int i; - /* Select 250MHz clk for RGMII mode */ - mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG, - ETHSYS_TRGMII_CLK_SEL362_5, 0); + if (priv->soc != SOC_MT7621) { + /* Select 250MHz clk for RGMII mode */ + mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG, + ETHSYS_TRGMII_CLK_SEL362_5, 0); + + txdrv = 8; + } else { + txdrv = 4; + } /* Modify HWTRAP first to allow direct access to internal PHYs */ mt753x_reg_read(priv, HWTRAP_REG, &val); @@ -738,7 +745,8 @@ static int mt7530_setup(struct mtk_eth_priv *priv) /* Lower Tx Driving for TRGMII path */ for (i = 0 ; i < NUM_TRGMII_CTRL ; i++) mt753x_reg_write(priv, MT7530_TRGMII_TD_ODT(i), - (8 << TD_DM_DRVP_S) | (8 << TD_DM_DRVN_S)); + (txdrv << TD_DM_DRVP_S) | + (txdrv << TD_DM_DRVN_S)); for (i = 0 ; i < NUM_TRGMII_CTRL; i++) mt753x_reg_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_M, 16); @@ -1540,6 +1548,7 @@ static const struct udevice_id mtk_eth_ids[] = { { .compatible = "mediatek,mt7629-eth", .data = SOC_MT7629 }, { .compatible = "mediatek,mt7623-eth", .data = SOC_MT7623 }, { .compatible = "mediatek,mt7622-eth", .data = SOC_MT7622 }, + { .compatible = "mediatek,mt7621-eth", .data = SOC_MT7621 }, {} }; |