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| author | Sumit Garg <sumit.garg@linaro.org> | 2023-02-01 19:28:54 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-02-10 12:50:00 -0500 |
| commit | a962b7cff4bd9f16dabc75917dc76e9ff959ad13 (patch) | |
| tree | d8e9e130cafedcaed79877ee4180de572f5670ec /drivers/net/dwc_eth_qos.c | |
| parent | 9d53f335f615d6219396358dd0a8df5ab67a849a (diff) | |
| download | u-boot-a962b7cff4bd9f16dabc75917dc76e9ff959ad13.zip u-boot-a962b7cff4bd9f16dabc75917dc76e9ff959ad13.tar.gz u-boot-a962b7cff4bd9f16dabc75917dc76e9ff959ad13.tar.bz2 | |
net: dwc_eth_qos: Allow platform to override tx/rx_fifo_sz
The GMAC controller on QCS404 SoC (support added by upcoming patch) fails
to work with maximum tx/rx_fifo_sz supported by the hardware (16K). So
allow platforms to override FIFO size using corresponding DT node
properties.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Diffstat (limited to 'drivers/net/dwc_eth_qos.c')
| -rw-r--r-- | drivers/net/dwc_eth_qos.c | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 753a912..65b8556 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -852,12 +852,19 @@ static int eqos_start(struct udevice *dev) rx_fifo_sz = (val >> EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT) & EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK; - /* - * r/tx_fifo_sz is encoded as log2(n / 128). Undo that by shifting. - * r/tqs is encoded as (n / 256) - 1. - */ - tqs = (128 << tx_fifo_sz) / 256 - 1; - rqs = (128 << rx_fifo_sz) / 256 - 1; + /* r/tx_fifo_sz is encoded as log2(n / 128). Undo that by shifting */ + tx_fifo_sz = 128 << tx_fifo_sz; + rx_fifo_sz = 128 << rx_fifo_sz; + + /* Allow platform to override TX/RX fifo size */ + if (eqos->tx_fifo_sz) + tx_fifo_sz = eqos->tx_fifo_sz; + if (eqos->rx_fifo_sz) + rx_fifo_sz = eqos->rx_fifo_sz; + + /* r/tqs is encoded as (n / 256) - 1 */ + tqs = tx_fifo_sz / 256 - 1; + rqs = rx_fifo_sz / 256 - 1; clrsetbits_le32(&eqos->mtl_regs->txq0_operation_mode, EQOS_MTL_TXQ0_OPERATION_MODE_TQS_MASK << |