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| author | Tom Rini <trini@konsulko.com> | 2018-10-25 10:16:21 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-10-25 10:16:21 -0400 |
| commit | cf033e04da315ba949e804c127abae0134bda30f (patch) | |
| tree | 77100d0a1c7ac1ce879509df57b845184f058550 /drivers/mmc | |
| parent | 1ed3c0954bd160dafcad8847a51c3ddd5f992f51 (diff) | |
| parent | 3c28576bb0f0990d699fd330089412e620706941 (diff) | |
| download | u-boot-cf033e04da315ba949e804c127abae0134bda30f.zip u-boot-cf033e04da315ba949e804c127abae0134bda30f.tar.gz u-boot-cf033e04da315ba949e804c127abae0134bda30f.tar.bz2 | |
Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx
Merged imx8 architecture, fix build for imx8 + warnings
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 03c6743..3cdfa7f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -11,6 +11,7 @@ #include <config.h> #include <common.h> #include <command.h> +#include <clk.h> #include <errno.h> #include <hwconfig.h> #include <mmc.h> @@ -121,6 +122,7 @@ struct esdhc_soc_data { struct fsl_esdhc_priv { struct fsl_esdhc *esdhc_regs; unsigned int sdhc_clk; + struct clk per_clk; unsigned int clock; unsigned int mode; unsigned int bus_width; @@ -257,7 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; #if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_MX8M) + defined(CONFIG_IMX8) || defined(CONFIG_MX8M) dma_addr_t addr; #endif uint wml_value; @@ -271,7 +273,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO #if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_MX8M) + defined(CONFIG_IMX8) || defined(CONFIG_MX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -301,7 +303,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO #if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_MX8M) + defined(CONFIG_IMX8) || defined(CONFIG_MX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -367,7 +369,7 @@ static void check_and_invalidate_dcache_range unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); #if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_MX8M) + defined(CONFIG_IMX8) || defined(CONFIG_MX8M) dma_addr_t addr; addr = virt_to_phys((void *)(data->dest)); @@ -1496,10 +1498,26 @@ static int fsl_esdhc_probe(struct udevice *dev) init_clk_usdhc(dev->seq); - priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq); - if (priv->sdhc_clk <= 0) { - dev_err(dev, "Unable to get clk for %s\n", dev->name); - return -EINVAL; + if (IS_ENABLED(CONFIG_CLK)) { + /* Assigned clock already set clock */ + ret = clk_get_by_name(dev, "per", &priv->per_clk); + if (ret) { + printf("Failed to get per_clk\n"); + return ret; + } + ret = clk_enable(&priv->per_clk); + if (ret) { + printf("Failed to enable per_clk\n"); + return ret; + } + + priv->sdhc_clk = clk_get_rate(&priv->per_clk); + } else { + priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq); + if (priv->sdhc_clk <= 0) { + dev_err(dev, "Unable to get clk for %s\n", dev->name); + return -EINVAL; + } } ret = fsl_esdhc_init(priv, plat); |