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| author | Jean-Jacques Hiblot <jjhiblot@ti.com> | 2017-11-30 17:43:55 +0100 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2018-01-12 18:11:04 +0900 |
| commit | 7abff2c3b3cbf091f486605684f306d0d631d8d6 (patch) | |
| tree | 4b43f5e0cd0d069a0bbb5aa9b6e176da4a564d1b /drivers/mmc/mmc-uclass.c | |
| parent | 52d241dfba7c3903a3a7d97fe6cb815c9ed379d6 (diff) | |
| download | u-boot-7abff2c3b3cbf091f486605684f306d0d631d8d6.zip u-boot-7abff2c3b3cbf091f486605684f306d0d631d8d6.tar.gz u-boot-7abff2c3b3cbf091f486605684f306d0d631d8d6.tar.bz2 | |
dm: mmc: update mmc_of_parse()
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Diffstat (limited to 'drivers/mmc/mmc-uclass.c')
| -rw-r--r-- | drivers/mmc/mmc-uclass.c | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index e30cde7..bfda942 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -10,7 +10,6 @@ #include <dm.h> #include <dm/device-internal.h> #include <dm/lists.h> -#include <dm/root.h> #include "mmc_private.h" DECLARE_GLOBAL_DATA_PTR; @@ -120,11 +119,11 @@ int mmc_execute_tuning(struct mmc *mmc, uint opcode) return dm_mmc_execute_tuning(mmc->dev, opcode); } -int mmc_of_parse(const void *fdt, int node, struct mmc_config *cfg) +int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg) { int val; - val = fdtdec_get_int(fdt, node, "bus-width", 1); + val = dev_read_u32_default(dev, "bus-width", 1); switch (val) { case 0x8: @@ -137,30 +136,35 @@ int mmc_of_parse(const void *fdt, int node, struct mmc_config *cfg) cfg->host_caps |= MMC_MODE_1BIT; break; default: - printf("error: %s invalid bus-width property %d\n", - fdt_get_name(fdt, node, NULL), val); - return -ENOENT; + debug("warning: %s invalid bus-width property. using 1-bit\n", + dev_read_name(dev)); + cfg->host_caps |= MMC_MODE_1BIT; + break; } - cfg->f_max = fdtdec_get_int(fdt, node, "max-frequency", 52000000); + cfg->f_max = dev_read_u32_default(dev, "max-frequency", 52000000); - if (fdtdec_get_bool(fdt, node, "cap-sd-highspeed")) + if (dev_read_bool(dev, "cap-sd-highspeed")) cfg->host_caps |= MMC_CAP(SD_HS); - if (fdtdec_get_bool(fdt, node, "cap-mmc-highspeed")) + if (dev_read_bool(dev, "cap-mmc-highspeed")) cfg->host_caps |= MMC_CAP(MMC_HS); - if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr12")) + if (dev_read_bool(dev, "sd-uhs-sdr12")) cfg->host_caps |= MMC_CAP(UHS_SDR12); - if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr25")) + if (dev_read_bool(dev, "sd-uhs-sdr25")) cfg->host_caps |= MMC_CAP(UHS_SDR25); - if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr50")) + if (dev_read_bool(dev, "sd-uhs-sdr50")) cfg->host_caps |= MMC_CAP(UHS_SDR50); - if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr104")) + if (dev_read_bool(dev, "sd-uhs-sdr104")) cfg->host_caps |= MMC_CAP(UHS_SDR104); - if (fdtdec_get_bool(fdt, node, "sd-uhs-ddr50")) + if (dev_read_bool(dev, "sd-uhs-ddr50")) cfg->host_caps |= MMC_CAP(UHS_DDR50); - if (fdtdec_get_bool(fdt, node, "mmc-ddr-1_8v")) + if (dev_read_bool(dev, "mmc-ddr-1_8v")) cfg->host_caps |= MMC_CAP(MMC_DDR_52); - if (fdtdec_get_bool(fdt, node, "mmc-hs200-1_8v")) + if (dev_read_bool(dev, "mmc-ddr-1_2v")) + cfg->host_caps |= MMC_CAP(MMC_DDR_52); + if (dev_read_bool(dev, "mmc-hs200-1_8v")) + cfg->host_caps |= MMC_CAP(MMC_HS_200); + if (dev_read_bool(dev, "mmc-hs200-1_2v")) cfg->host_caps |= MMC_CAP(MMC_HS_200); return 0; |