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| author | Siew Chin Lim <elly.siew.chin.lim@intel.com> | 2020-12-24 18:21:03 +0800 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2021-01-15 17:48:36 +0800 |
| commit | d456dfbaa0d8e43991791723cbcd0b9def95fd8d (patch) | |
| tree | f0611d062687e25e4d47aa8d84ff2a69bf71261b /drivers/mmc/exynos_dw_mmc.c | |
| parent | 2e54a1d46c143f12653a44c8485e7d8bfd573b1d (diff) | |
| download | u-boot-d456dfbaa0d8e43991791723cbcd0b9def95fd8d.zip u-boot-d456dfbaa0d8e43991791723cbcd0b9def95fd8d.tar.gz u-boot-d456dfbaa0d8e43991791723cbcd0b9def95fd8d.tar.bz2 | |
mmc: dwmmc: Change designware MMC 'clksel' callback function to return status
Change 'clksel' callback function to allow the code to return a
status.
This patch is a preparation for enabling Arm-Trusted-Firmware (ATF)
in Intel SoC FPGA. This patch does not change functionality.
When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock
related register is secure register which is required to be written
via SMC/PCSI call. It is possible that U-Boot fail to write the
register if there is unexpected error between U-Boot and ATF.
As a result, there maybe signal integrity on MMC connection due to
clock. So, the code should reports error to user when 'clksel' fail.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Diffstat (limited to 'drivers/mmc/exynos_dw_mmc.c')
| -rw-r--r-- | drivers/mmc/exynos_dw_mmc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 3aa9fb3..2fc1ef1 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -44,7 +44,7 @@ struct dwmci_exynos_priv_data { * Function used as callback function to initialise the * CLKSEL register for every mmc channel. */ -static void exynos_dwmci_clksel(struct dwmci_host *host) +static int exynos_dwmci_clksel(struct dwmci_host *host) { #ifdef CONFIG_DM_MMC struct dwmci_exynos_priv_data *priv = @@ -53,6 +53,8 @@ static void exynos_dwmci_clksel(struct dwmci_host *host) struct dwmci_exynos_priv_data *priv = host->priv; #endif dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); + + return 0; } unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) |