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| author | Robert Marko <robert.marko@sartura.hr> | 2020-09-10 16:00:02 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-09-18 16:20:47 -0400 |
| commit | 8ef7df5df39edbeb1367409cc340646810d2369b (patch) | |
| tree | 4772938d6e8b1229ad021c66a6bfbc19626b294c /drivers/i2c/cros_ec_tunnel.c | |
| parent | 6ef099b29e153f664b1de829020b4410b9ec709d (diff) | |
| download | u-boot-8ef7df5df39edbeb1367409cc340646810d2369b.zip u-boot-8ef7df5df39edbeb1367409cc340646810d2369b.tar.gz u-boot-8ef7df5df39edbeb1367409cc340646810d2369b.tar.bz2 | |
reset: Add IPQ40xx reset controller driver
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the reset controller.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'drivers/i2c/cros_ec_tunnel.c')
0 files changed, 0 insertions, 0 deletions