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author | Wolfgang Wallner <wolfgang.wallner@br-automation.com> | 2020-02-03 11:38:06 +0100 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2020-02-04 12:54:55 +0800 |
commit | ea86e725d4c363232047126f1c84b03f13de7840 (patch) | |
tree | 6bbceb89d75fb9117751d8a76236e0c1a1d2cd08 /drivers/gpio | |
parent | 28c626804dee51dd89a5a400e0cb663ee9cc77ed (diff) | |
download | u-boot-ea86e725d4c363232047126f1c84b03f13de7840.zip u-boot-ea86e725d4c363232047126f1c84b03f13de7840.tar.gz u-boot-ea86e725d4c363232047126f1c84b03f13de7840.tar.bz2 |
gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value()
Fix the following in intel_gpio_get_value():
* The value of the register is contained in the variable 'reg', not in
'mode'. The variable 'mode' contains only the configuration whether
the gpio is currently an input or an output.
* The correct bitmasks for the input and output value are
PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE.
Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and
PAD_CFG0_TX_STATE_BIT.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/gpio')
-rw-r--r-- | drivers/gpio/intel_gpio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index be91626..67b8b80 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -59,9 +59,9 @@ static int intel_gpio_get_value(struct udevice *dev, uint offset) if (!mode) { rx_tx = reg & (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE); if (rx_tx == PAD_CFG0_TX_DISABLE) - return mode & PAD_CFG0_RX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_RX_STATE ? 1 : 0; else if (rx_tx == PAD_CFG0_RX_DISABLE) - return mode & PAD_CFG0_TX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_TX_STATE ? 1 : 0; } return 0; |