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| author | Sujeet Baranwal <sbaranwal@marvell.com> | 2021-02-26 11:56:59 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2021-03-12 07:42:37 +0100 |
| commit | a5fc099081c7f21651760308a4fa85b90a0bc1fc (patch) | |
| tree | 1b7f96fa0640766bf1180b6643c7318d43f4f06d /drivers/ddr | |
| parent | 4c8e9361bb3ced3b20e45ee94b3751da1a9ed850 (diff) | |
| download | u-boot-a5fc099081c7f21651760308a4fa85b90a0bc1fc.zip u-boot-a5fc099081c7f21651760308a4fa85b90a0bc1fc.tar.gz u-boot-a5fc099081c7f21651760308a4fa85b90a0bc1fc.tar.bz2 | |
ddr: marvell: a38x: Add more space for additional info from SPD
commit 258be123226f8f5cd516b7813fe201fb7d7416e9 upstream.
At this moment, only page 0 of SPD is being read but to support
smbios, we need to read page 1 also which has more info. In order
to do that, we need to allocate more space.
Signed-off-by: Sujeet Baranwal <sujeet.baranwal@cavium.com>
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Sujeet Kumar Baranwal <Sujeet.Baranwal@cavium.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/marvell/a38x/mv_ddr_spd.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_spd.h b/drivers/ddr/marvell/a38x/mv_ddr_spd.h index b4bfef3..6043f11 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_spd.h +++ b/drivers/ddr/marvell/a38x/mv_ddr_spd.h @@ -40,7 +40,10 @@ */ union mv_ddr_spd_data { unsigned char all_bytes[MV_DDR_SPD_DATA_BLOCK0_SIZE + - MV_DDR_SPD_DATA_BLOCK1M_SIZE]; + MV_DDR_SPD_DATA_BLOCK1M_SIZE + + MV_DDR_SPD_DATA_BLOCK1H_SIZE + + MV_DDR_SPD_DATA_BLOCK2E_SIZE + + MV_DDR_SPD_DATA_BLOCK2M_SIZE]; struct { /* block 0 */ union { /* num of bytes used/num of bytes in spd device/crc coverage */ @@ -271,6 +274,9 @@ union mv_ddr_spd_data { } bit_fields; } byte_131; unsigned char bytes_132_191[60]; /* reserved; all 0s */ + unsigned char bytes_192_255[MV_DDR_SPD_DATA_BLOCK1H_SIZE]; + unsigned char bytes_256_319[MV_DDR_SPD_DATA_BLOCK2E_SIZE]; + unsigned char bytes_320_383[MV_DDR_SPD_DATA_BLOCK2M_SIZE]; } byte_fields; }; |