diff options
author | Wolfgang Denk <wd@denx.de> | 2021-09-27 17:42:39 +0200 |
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committer | Tom Rini <trini@konsulko.com> | 2021-09-30 08:13:28 -0400 |
commit | d4983bcdcc4af46aa9eab2a3000d7353af7aefac (patch) | |
tree | f9264c9657e9d3445befc87b8be7eaf530d71c80 /drivers/ddr | |
parent | 0a50b3c97b3408e52589d873d4c7b54ad365a76c (diff) | |
download | u-boot-WIP/2021-09-30-whitespace-cleanups.zip u-boot-WIP/2021-09-30-whitespace-cleanups.tar.gz u-boot-WIP/2021-09-30-whitespace-cleanups.tar.bz2 |
WS cleanup: remove SPACE(s) followed by TABWIP/2021-09-30-whitespace-cleanups
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'drivers/ddr')
-rw-r--r-- | drivers/ddr/fsl/ddr3_dimm_params.c | 18 | ||||
-rw-r--r-- | drivers/ddr/marvell/axp/ddr3_spd.c | 2 |
2 files changed, 10 insertions, 10 deletions
diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c index 8464438..1f8db90 100644 --- a/drivers/ddr/fsl/ddr3_dimm_params.c +++ b/drivers/ddr/fsl/ddr3_dimm_params.c @@ -36,18 +36,18 @@ * 0110 16Gb 2GB * * SPD byte8 - module memory bus width - * bit[2:0] primary bus width + * bit[2:0] primary bus width * 000 8bits - * 001 16bits - * 010 32bits - * 011 64bits + * 001 16bits + * 010 32bits + * 011 64bits * * SPD byte7 - module organiztion - * bit[2:0] sdram device width - * 000 4bits - * 001 8bits - * 010 16bits - * 011 32bits + * bit[2:0] sdram device width + * 000 4bits + * 001 8bits + * 010 16bits + * 011 32bits * */ static unsigned long long diff --git a/drivers/ddr/marvell/axp/ddr3_spd.c b/drivers/ddr/marvell/axp/ddr3_spd.c index e2305d8..dd772e6 100644 --- a/drivers/ddr/marvell/axp/ddr3_spd.c +++ b/drivers/ddr/marvell/axp/ddr3_spd.c @@ -46,7 +46,7 @@ #define SPD_COL_NUM_MASK (7 << SPD_COL_NUM_OFF) #define SPD_MODULE_ORG_BYTE 7 -#define SPD_MODULE_SDRAM_DEV_WIDTH_OFF 0 +#define SPD_MODULE_SDRAM_DEV_WIDTH_OFF 0 #define SPD_MODULE_SDRAM_DEV_WIDTH_MASK (7 << SPD_MODULE_SDRAM_DEV_WIDTH_OFF) #define SPD_MODULE_BANK_NUM_MIN 1 #define SPD_MODULE_BANK_NUM_OFF 3 |