aboutsummaryrefslogtreecommitdiff
path: root/drivers/cpu/imx8_cpu.c
diff options
context:
space:
mode:
authorPeng Fan <peng.fan@nxp.com>2020-05-03 21:58:53 +0800
committerStefano Babic <sbabic@denx.de>2020-05-03 15:45:49 +0200
commit55bc96f3b675d719a473a8985636e76381b18cb8 (patch)
tree4de8eea5c6948857f58100bdb00beeaa9053f002 /drivers/cpu/imx8_cpu.c
parent177f9996d3cdf04a592bc0fece640cf4d492d1cb (diff)
downloadu-boot-55bc96f3b675d719a473a8985636e76381b18cb8.zip
u-boot-55bc96f3b675d719a473a8985636e76381b18cb8.tar.gz
u-boot-55bc96f3b675d719a473a8985636e76381b18cb8.tar.bz2
cpu: imx8: fix get core name and rate
When current cpu is A53, using is_cortex_a53 could not detect A72 information, so check cpu device compatible property to get the correct information. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/cpu/imx8_cpu.c')
-rw-r--r--drivers/cpu/imx8_cpu.c27
1 files changed, 17 insertions, 10 deletions
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index c4679e1..cd11b78 100644
--- a/drivers/cpu/imx8_cpu.c
+++ b/drivers/cpu/imx8_cpu.c
@@ -48,13 +48,13 @@ const char *get_imx8_rev(u32 rev)
}
}
-const char *get_core_name(void)
+const char *get_core_name(struct udevice *dev)
{
- if (is_cortex_a35())
+ if (!device_is_compatible(dev, "arm,cortex-a35"))
return "A35";
- else if (is_cortex_a53())
+ else if (!device_is_compatible(dev, "arm,cortex-a53"))
return "A53";
- else if (is_cortex_a72())
+ else if (!device_is_compatible(dev, "arm,cortex-a72"))
return "A72";
else
return "?";
@@ -170,12 +170,19 @@ static const struct udevice_id cpu_imx8_ids[] = {
{ }
};
-static ulong imx8_get_cpu_rate(void)
+static ulong imx8_get_cpu_rate(struct udevice *dev)
{
ulong rate;
- int ret;
- int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
- SC_R_A53 : SC_R_A72;
+ int ret, type;
+
+ if (!device_is_compatible(dev, "arm,cortex-a35"))
+ type = SC_R_A35;
+ else if (!device_is_compatible(dev, "arm,cortex-a53"))
+ type = SC_R_A53;
+ else if (!device_is_compatible(dev, "arm,cortex-a72"))
+ type = SC_R_A72;
+ else
+ return 0;
ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
(sc_pm_clock_rate_t *)&rate);
@@ -194,10 +201,10 @@ static int imx8_cpu_probe(struct udevice *dev)
cpurev = get_cpu_rev();
plat->cpurev = cpurev;
- plat->name = get_core_name();
+ plat->name = get_core_name(dev);
plat->rev = get_imx8_rev(cpurev & 0xFFF);
plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
- plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
+ plat->freq_mhz = imx8_get_cpu_rate(dev) / 1000000;
plat->mpidr = dev_read_addr(dev);
if (plat->mpidr == FDT_ADDR_T_NONE) {
printf("%s: Failed to get CPU reg property\n", __func__);