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| author | Jesse Taube <mr.bossman075@gmail.com> | 2022-03-17 14:33:18 -0400 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-04-12 21:08:23 +0200 |
| commit | a2d6fbf5ff54cdeb2f75708e3551ee2df680a60c (patch) | |
| tree | 88627caed9da8911e5f9ed2060d9b03f82a76eb3 /drivers/clk | |
| parent | c8009c15272e803ec5a720bff0f60723cd2b5a0d (diff) | |
| download | u-boot-a2d6fbf5ff54cdeb2f75708e3551ee2df680a60c.zip u-boot-a2d6fbf5ff54cdeb2f75708e3551ee2df680a60c.tar.gz u-boot-a2d6fbf5ff54cdeb2f75708e3551ee2df680a60c.tar.bz2 | |
clk: imxrt: Use dts for anatop base address
In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-imxrt1020.c | 2 | ||||
| -rw-r--r-- | drivers/clk/imx/clk-imxrt1050.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c index 3f8b4df..dc91ac5 100644 --- a/drivers/clk/imx/clk-imxrt1020.c +++ b/drivers/clk/imx/clk-imxrt1020.c @@ -36,7 +36,7 @@ static int imxrt1020_clk_probe(struct udevice *dev) void *base; /* Anatop clocks */ - base = (void *)ANATOP_BASE_ADDR; + base = (void *)ofnode_get_addr(ofnode_by_compatible(ofnode_null(), "fsl,imxrt-anatop")); clk_dm(IMXRT1020_CLK_PLL2_SYS, imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_sys", "osc", diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index 5cb5e3b..d40635d 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -34,7 +34,7 @@ static int imxrt1050_clk_probe(struct udevice *dev) void *base; /* Anatop clocks */ - base = (void *)ANATOP_BASE_ADDR; + base = (void *)ofnode_get_addr(ofnode_by_compatible(ofnode_null(), "fsl,imxrt-anatop")); clk_dm(IMXRT1050_CLK_PLL1_REF_SEL, imx_clk_mux("pll1_arm_ref_sel", base + 0x0, 14, 2, |