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author | Tom Rini <trini@konsulko.com> | 2023-03-16 12:18:30 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2023-03-16 12:18:30 -0400 |
commit | cefd0449d6df77eb0edb8a6800a441f9cd4e3653 (patch) | |
tree | ba939b19698ff7f7dee9f274d9ecb20733cbe09f /drivers/clk | |
parent | e63828bf35ac5632bd584980df5014c7c3e8c44d (diff) | |
parent | 7ac50f88f8a9374e5cb4bc2a88c002d02ef3c570 (diff) | |
download | u-boot-WIP/16Mar2023-next.zip u-boot-WIP/16Mar2023-next.tar.gz u-boot-WIP/16Mar2023-next.tar.bz2 |
Merge tag 'xilinx-for-v2023.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into nextWIP/16Mar2023-next
Xilinx changes for v2023.07-rc1
cmd:
- Print results in hex instead of dec in smc command
firmware:
- Cover missing ZYNQMP_FIRMWARE dependencies
fpga:
- fix loads for unencrypted use case
relocation
- Add support for BE systems
spi:
- Fix xilinx_spi init reset sequence
arasan nand:
- Remove hardcoded bbt option
- Set ofnode value
xilinx:
- Enable SMC command
- Fix some sparse issues
zynqmp:
- Remove cdns,zynq-gem compatible string
- Add optee node
- Some DT cleanups
zynq:
- Some DT cleanups
microblaze
- Remove MANUAL_RELOC option
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/Kconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 09aa97e..42280cb 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -185,7 +185,7 @@ config CLK_VERSACLOCK config CLK_VERSAL bool "Enable clock driver support for Versal" depends on (ARCH_VERSAL || ARCH_VERSAL_NET) - select ZYNQMP_FIRMWARE + imply ZYNQMP_FIRMWARE help This clock driver adds support for clock realted settings for Versal platform. @@ -219,7 +219,7 @@ config CLK_ZYNQ config CLK_ZYNQMP bool "Enable clock driver support for ZynqMP" depends on ARCH_ZYNQMP - select ZYNQMP_FIRMWARE + imply ZYNQMP_FIRMWARE help This clock driver adds support for clock realted settings for ZynqMP platform. |