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| author | Michal Simek <michal.simek@xilinx.com> | 2018-02-21 15:06:20 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-03-23 09:34:43 +0100 |
| commit | 58afff43e3a8f31344cbbc6a3f09bd3f7a2a70eb (patch) | |
| tree | f455d56690cba8e4c9062d55c7b8dce40888d29a /drivers/clk | |
| parent | 1cf6cac4d16ef5e9f7c0fa9cd62275924626a130 (diff) | |
| download | u-boot-58afff43e3a8f31344cbbc6a3f09bd3f7a2a70eb.zip u-boot-58afff43e3a8f31344cbbc6a3f09bd3f7a2a70eb.tar.gz u-boot-58afff43e3a8f31344cbbc6a3f09bd3f7a2a70eb.tar.bz2 | |
clk: zynq: Show watchdog clock rate properly
watchdog clock is also connected to cpu 1X clocksource.
Zynq> clk dump
...
Before:
swdt 4294967290
After:
swdt 111111110
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/clk_zynq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c index 50f2a65..3845e07 100644 --- a/drivers/clk/clk_zynq.c +++ b/drivers/clk/clk_zynq.c @@ -394,7 +394,7 @@ static ulong zynq_clk_get_rate(struct clk *clk) return zynq_clk_get_peripheral_rate(priv, id, two_divs); case dma_clk: return zynq_clk_get_cpu_rate(priv, cpu_2x_clk); - case usb0_aper_clk ... smc_aper_clk: + case usb0_aper_clk ... swdt_clk: return zynq_clk_get_cpu_rate(priv, cpu_1x_clk); default: return -ENXIO; |