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| author | Wenyou Yang <wenyou.yang@microchip.com> | 2017-09-05 18:30:07 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-09-14 16:02:29 -0400 |
| commit | e7c831543ab8deeb1eb4bf4d13d59f55a268865e (patch) | |
| tree | aaf4d9198f4f0eb024518b420d8229486b175976 /drivers/clk/at91/Kconfig | |
| parent | 0712b672d2a1f9a156c489b4dd7ce8354c2b3e1f (diff) | |
| download | u-boot-e7c831543ab8deeb1eb4bf4d13d59f55a268865e.zip u-boot-e7c831543ab8deeb1eb4bf4d13d59f55a268865e.tar.gz u-boot-e7c831543ab8deeb1eb4bf4d13d59f55a268865e.tar.bz2 | |
clk: at91: utmi: Set the reference clock frequency
By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.
The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.
The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/clk/at91/Kconfig')
| -rw-r--r-- | drivers/clk/at91/Kconfig | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig index 904ed48..c6c5761 100644 --- a/drivers/clk/at91/Kconfig +++ b/drivers/clk/at91/Kconfig @@ -14,7 +14,11 @@ config CLK_AT91 config AT91_UTMI bool "Support UTMI PLL Clock" - depends on CLK_AT91 + depends on CLK_AT91 && SPL_DM + select REGMAP + select SPL_REGMAP + select SYSCON + select SPL_SYSCON help This option is used to enable the AT91 UTMI PLL clock driver. It is the clock provider of USB, and UPLLCK is the |