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| author | Adam Ford <aford173@gmail.com> | 2021-06-04 12:26:06 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-08-21 18:23:02 -0400 |
| commit | dcf2cee77f2d185418b741c91ea981390fa6231f (patch) | |
| tree | 36b667082e808ed75e1c99e10f6c47e2fa833337 /drivers/clk/Makefile | |
| parent | 79d389a54891a67269bfa366f044a2079409e499 (diff) | |
| download | u-boot-dcf2cee77f2d185418b741c91ea981390fa6231f.zip u-boot-dcf2cee77f2d185418b741c91ea981390fa6231f.tar.gz u-boot-dcf2cee77f2d185418b741c91ea981390fa6231f.tar.bz2 | |
clk: clk_versaclock: Add support for versaclock driver
The driver is based on the Versaclock driver from the Linux code, but
due differences in the clock API between them, some pieces had to be
changed.
This driver creates a mux, pfd, pll, and a series of fod ouputs.
Rate Usecnt Name
------------------------------------------
25000000 0 `-- x304-clock
25000000 0 `-- clock-controller@6a.mux
25000000 0 |-- clock-controller@6a.pfd
2800000000 0 | `-- clock-controller@6a.pll
33333333 0 | |-- clock-controller@6a.fod0
33333333 0 | | `-- clock-controller@6a.out1
33333333 0 | |-- clock-controller@6a.fod1
33333333 0 | | `-- clock-controller@6a.out2
50000000 0 | |-- clock-controller@6a.fod2
50000000 0 | | `-- clock-controller@6a.out3
125000000 0 | `-- clock-controller@6a.fod3
125000000 0 | `-- clock-controller@6a.out4
25000000 0 `-- clock-controller@6a.out0_sel_i2cb
A translation function is added so the references to <&versaclock X> get routed
to the corresponding clock-controller@6a.outX.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Diffstat (limited to 'drivers/clk/Makefile')
| -rw-r--r-- | drivers/clk/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 6e9c2d5..711ae5b 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -52,3 +52,4 @@ obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o obj-$(CONFIG_STM32H7) += clk_stm32h7.o obj-$(CONFIG_CLK_VERSAL) += clk_versal.o obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o +obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o |