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| author | Dinh Nguyen <dinguyen@kernel.org> | 2019-04-23 16:55:03 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-05 08:48:50 -0400 |
| commit | 84b124db3584d8b3f1a42c1506983323bce9983f (patch) | |
| tree | b343ae85d7c2600aca0edd911b4b01c6975ac4ad /drivers/cache/Kconfig | |
| parent | 2bac27ce945e8399ea2c1404310ead450c065819 (diff) | |
| download | u-boot-84b124db3584d8b3f1a42c1506983323bce9983f.zip u-boot-84b124db3584d8b3f1a42c1506983323bce9983f.tar.gz u-boot-84b124db3584d8b3f1a42c1506983323bce9983f.tar.bz2 | |
dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.
Add a uclass and a test for cache.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'drivers/cache/Kconfig')
| -rw-r--r-- | drivers/cache/Kconfig | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig new file mode 100644 index 0000000..8b7c9c7 --- /dev/null +++ b/drivers/cache/Kconfig @@ -0,0 +1,16 @@ +# +# Cache controllers +# + +menu "Cache Controller drivers" + +config CACHE + bool "Enable Driver Model for Cache controllers" + depends on DM + help + Enable driver model for cache controllers that are found on + most CPU's. Cache is memory that the CPU can access directly and + is usually located on the same chip. This uclass can be used for + configuring settings that be found from a device tree file. + +endmenu |