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author | Oleksandr Rybalko <ray@ddteam.net> | 2019-08-22 12:26:56 +0200 |
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committer | Tom Rini <trini@konsulko.com> | 2019-10-11 10:10:19 -0400 |
commit | 5b7a2bf318e1358f978180a51fd5a305723d165b (patch) | |
tree | c3261b7a9f2874bd82aa3cbeebbcbca07b7c388c /drivers/ata | |
parent | 25643a5c3e5cecac1e73bfff04c414d12c302edc (diff) | |
download | u-boot-5b7a2bf318e1358f978180a51fd5a305723d165b.zip u-boot-5b7a2bf318e1358f978180a51fd5a305723d165b.tar.gz u-boot-5b7a2bf318e1358f978180a51fd5a305723d165b.tar.bz2 |
ata: ahci: Don't forget to clear upper address regs.
In 32bits mode upper bits need to be set to 0, otherwise controller will
try to DMA into not existing memory and stops with error.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
Diffstat (limited to 'drivers/ata')
-rw-r--r-- | drivers/ata/ahci.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 9a08575..21a89eb 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -548,6 +548,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) { struct ahci_ioports *pp = &(uc_priv->port[port]); void __iomem *port_mmio = pp->port_mmio; + u64 dma_addr; u32 port_status; void __iomem *mem; @@ -593,10 +594,12 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) pp->cmd_tbl_sg = (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem); - writel_with_flush((unsigned long)pp->cmd_slot, - port_mmio + PORT_LST_ADDR); - - writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR); + dma_addr = (ulong)pp->cmd_slot; + writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR); + writel_with_flush(dma_addr >> 32, port_mmio + PORT_LST_ADDR_HI); + dma_addr = (ulong)pp->rx_fis; + writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR); + writel_with_flush(dma_addr >> 32, port_mmio + PORT_FIS_ADDR_HI); #ifdef CONFIG_SUNXI_AHCI sunxi_dma_init(port_mmio); |