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authorSimon Glass <sjg@chromium.org>2019-05-02 10:52:16 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-05-08 13:02:17 +0800
commitd4d2521c0635fe31118b23641c06bf2387d69727 (patch)
tree6b82cba2cc9be0eb829d9840461d55dc4f31ea54 /doc
parent6c456516e24fb23eee01245097ef26885bc8842c (diff)
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x86: Add documentation on the samus flashmap
There are quite a few variables which control where things appear in the final ROM image. Add a flashmap in the documentation to make this easier to figure out. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: squashed "x86: Update the memory map a little" in] [bmeng: fixed typo of 'documentation' in the commit title] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.x8616
1 files changed, 16 insertions, 0 deletions
diff --git a/doc/README.x86 b/doc/README.x86
index fa49cb8..8e0a3f3 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -185,6 +185,22 @@ If you are using em100, then this command will flash write -Boot:
em100 -s -d filename.rom -c W25Q64CV -r
+Flash map for samus / broadwell:
+
+ fffff800 SYS_X86_START16
+ ffff0000 RESET_SEG_START
+ fffd8000 TPL_TEXT_BASE
+ fffa0000 X86_MRC_ADDR
+ fff90000 VGA_BIOS_ADDR
+ ffed0000 SYS_TEXT_BASE
+ ffea0000 X86_REFCODE_ADDR
+ ffe70000 SPL_TEXT_BASE
+ ffbf8000 CONFIG_ENV_OFFSET (environemnt offset)
+ ffbe0000 rw-mrc-cache (Memory-reference-code cache)
+ ffa00000 <spare>
+ ff801000 intel-me (address set by descriptor.bin)
+ ff800000 intel-descriptor
+
---
Intel Crown Bay specific instructions for bare mode: