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authorTom Rini <trini@konsulko.com>2020-12-18 13:06:02 -0500
committerTom Rini <trini@konsulko.com>2020-12-18 13:06:02 -0500
commit549e7cb70843d4729524cbb03fe3a4b5dab42d94 (patch)
treed42cd9c31699f2af89a01b01e3060a9d71b16199 /doc
parent233a4d47e71114b8a48105a169a82da5b67ff47f (diff)
parent936a645609145363b9580adeda831ab3d9ac1d78 (diff)
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Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spiWIP/18Dec2020
Diffstat (limited to 'doc')
-rw-r--r--doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt56
-rw-r--r--doc/uImage.FIT/source_file_format.txt2
2 files changed, 57 insertions, 1 deletions
diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
new file mode 100644
index 0000000..8d2888f
--- /dev/null
+++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
@@ -0,0 +1,56 @@
+Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
+and Synopsys DesignWare High Performance Synchronous Serial Interface
+
+Required properties:
+- compatible : One of
+ "altr,socfpga-spi",
+ "altr,socfpga-arria10-spi",
+ "canaan,kendryte-k210-spi",
+ "canaan,kendryte-k210-ssi",
+ "intel,stratix10-spi",
+ "intel,agilex-spi",
+ "mscc,ocelot-spi",
+ or "mscc,jaguar2-spi";
+ and one of
+ "snps,dw-apb-ssi-3.20a",
+ "snps,dw-apb-ssi-3.22a",
+ "snps,dw-apb-ssi-3.23",
+ "snps,dw-apb-ssi-4.00a",
+ "snps,dw-apb-ssi-4.01",
+ or "snps,dwc-ssi-1.01a".
+ "snps,dw-apb-ssi" may also be used, but is deprecated in favor of specific
+ version strings.
+- reg : The register base for the controller. For "mscc,<soc>-spi", a second
+ register set is required (named ICPU_CFG:SPI_MST)
+- #address-cells : <1>, as required by generic SPI binding.
+- #size-cells : <0>, also as required by generic SPI binding.
+- clocks : phandles for the clocks, see the description of clock-names below.
+ The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
+ is optional. If a single clock is specified but no clock-name, it is the
+ "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
+
+Optional properties:
+- clock-names : Contains the names of the clocks:
+ "ssi_clk", for the core clock used to generate the external SPI clock.
+ "pclk", the interface clock, required for register access.
+- cs-gpios : Specifies the gpio pins to be used for chipselects.
+- num-cs : The number of chipselects. If omitted, this will default to 4.
+- reg-io-width : The I/O register width (in bytes) implemented by this
+ device. Supported values are 2 or 4 (the default).
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+ spi@fff00000 {
+ compatible = "altr,socfpga-arria10-spi",
+ "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi";
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 154 4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&spi_m_clk>;
+ num-cs = <2>;
+ cs-gpios = <&gpio0 13 0>,
+ <&gpio0 14 0>;
+ };
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 884a584..633f227 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -172,7 +172,7 @@ the '/images' node should have the following layout:
- os : OS name, mandatory for types "kernel" and "ramdisk". Valid OS names
are: "openbsd", "netbsd", "freebsd", "4_4bsd", "linux", "svr4", "esix",
"solaris", "irix", "sco", "dell", "ncr", "lynxos", "vxworks", "psos", "qnx",
- "u_boot", "rtems", "unity", "integrity".
+ "u-boot", "rtems", "unity", "integrity".
- arch : Architecture name, mandatory for types: "standalone", "kernel",
"firmware", "ramdisk" and "fdt". Valid architecture names are: "alpha",
"arm", "i386", "ia64", "mips", "mips64", "ppc", "s390", "sh", "sparc",