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authorSimon Glass <sjg@chromium.org>2021-06-27 17:51:08 -0600
committerBin Meng <bmeng.cn@gmail.com>2021-07-15 19:50:23 +0800
commite74d0ec80bfd4a8326008836dfc81099382a41b5 (patch)
treebfeb76f12d2de5668c2f9095dacf9b16cbc743a3 /doc
parent4dfe4b44cc7f0df78d9013619ec6c411e7b60bbd (diff)
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x86: coreboot: Document the memory map
Add information about memory usage when U-Boot is started from coreboot. This is useful when debugging. Also, since coreboot takes a chunk of memory in the middle of SDRAM for use by PCI devices, it can help avoid overwriting this with a loaded kernel by accident. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/board/coreboot/coreboot.rst21
1 files changed, 21 insertions, 0 deletions
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index 9c44c02..3792f9e 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -50,3 +50,24 @@ works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
can be useful for running UEFI applications, for example.
This has only been lightly tested.
+
+
+Memory map
+----------
+
+ ========== ==================================================================
+ Address Region at that address
+ ========== ==================================================================
+ ffffffff Top of ROM (and last byte of 32-bit address space)
+ 7a9fd000 Typical top of memory available to U-Boot
+ (use cbsysinfo to see where memory range 'table' starts)
+ 10000000 Memory reserved by coreboot for mapping PCI devices
+ (typical size 2151000, includes framebuffer)
+ 1920000 CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
+ 1110000 CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc)
+ 110000 CONFIG_BLOBLIST_ADDR (before being relocated)
+ 100000 CONFIG_PRE_CON_BUF_ADDR
+ f0000 ACPI tables set up by U-Boot
+ (typically redirects to 7ab10030 or similar)
+ 500 Location of coreboot sysinfo table, used during startup
+ ========== ==================================================================