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author | Tom Rini <trini@konsulko.com> | 2020-10-22 14:36:47 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2020-10-22 14:36:47 -0400 |
commit | ae4fdd7b0432bcb0bc2fe7d90b6d3e92001ab478 (patch) | |
tree | e933e67609989d0e4960f1464384e9ff40732b30 /doc | |
parent | b90daf2743b38022bea8727ede867ad63e971db2 (diff) | |
parent | dddfde5401ed5ad82c996b35b61dc4a45bb4e2b3 (diff) | |
download | u-boot-ae4fdd7b0432bcb0bc2fe7d90b6d3e92001ab478.zip u-boot-ae4fdd7b0432bcb0bc2fe7d90b6d3e92001ab478.tar.gz u-boot-ae4fdd7b0432bcb0bc2fe7d90b6d3e92001ab478.tar.bz2 |
Merge branch '2020-10-22-misc-changes'
- Assorted updates for Xen, IPQ40xx, ASpeed, Keymile
- Assorted typo / documentation fixes
- Fix default preboot cmd to act like before with USB_STORAGE set
- A number of other bugfixes throughout the code
Diffstat (limited to 'doc')
-rw-r--r-- | doc/README.dfu | 2 | ||||
-rw-r--r-- | doc/api/index.rst | 1 | ||||
-rw-r--r-- | doc/api/timer.rst | 8 | ||||
-rw-r--r-- | doc/develop/logging.rst | 13 | ||||
-rw-r--r-- | doc/device-tree-bindings/spi/spi-qup.txt | 33 |
5 files changed, 51 insertions, 6 deletions
diff --git a/doc/README.dfu b/doc/README.dfu index 4b9f883..be53b5b 100644 --- a/doc/README.dfu +++ b/doc/README.dfu @@ -121,7 +121,7 @@ Commands: "sf" (serial flash : NOR) cmd: dfu 0 sf <dev> each element in "dfu_alt_info" = - <name> ram <offset> <size> raw access to sf device + <name> raw <offset> <size> raw access to sf device <name> part <dev> <part_id> raw acces to partition <name> partubi <dev> <part_id> raw acces to ubi partition diff --git a/doc/api/index.rst b/doc/api/index.rst index 1c261bc..787b677 100644 --- a/doc/api/index.rst +++ b/doc/api/index.rst @@ -12,4 +12,5 @@ U-Boot API documentation pinctrl rng serial + timer unicode diff --git a/doc/api/timer.rst b/doc/api/timer.rst new file mode 100644 index 0000000..b069517 --- /dev/null +++ b/doc/api/timer.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2020 Sean Anderson <seanga2@gmail.com> + +Timer Subsystem +=============== + +.. kernel-doc:: include/timer.h + :internal: diff --git a/doc/develop/logging.rst b/doc/develop/logging.rst index 7ce8482..28340a4 100644 --- a/doc/develop/logging.rst +++ b/doc/develop/logging.rst @@ -83,11 +83,8 @@ Sometimes it is useful to turn on logging just in one file. You can use this #define LOG_DEBUG to enable building in of all logging statements in a single file. Put it at -the top of the file, before any #includes. - -To actually get U-Boot to output this you need to also set the default logging -level - e.g. set CONFIG_LOG_DEFAULT_LEVEL to 7 (LOGL_DEBUG) or more. Otherwise -debug output is suppressed and will not be generated. +the top of the file, before any #includes. This overrides any log-level setting +in U-Boot, including CONFIG_LOG_DEFAULT_LEVEL, but just for that file. Convenience functions @@ -111,6 +108,12 @@ LOG_CATEGORY, which you can only define once per file, above all #includes, e.g. #define LOG_CATEGORY LOGC_ALLOC +or + +.. code-block:: c + + #define LOG_CATEGORY UCLASS_SPI + Remember that all uclasses IDs are log categories too. diff --git a/doc/device-tree-bindings/spi/spi-qup.txt b/doc/device-tree-bindings/spi/spi-qup.txt new file mode 100644 index 0000000..3697df2 --- /dev/null +++ b/doc/device-tree-bindings/spi/spi-qup.txt @@ -0,0 +1,33 @@ +Qualcomm QUP SPI controller Device Tree Bindings +------------------------------------------- + +Required properties: +- compatible : Should be "qcom,spi-qup-v1.1.1", "qcom,spi-qup-v2.1.1" + or "qcom,spi-qup-v2.2.1" +- reg : Physical base address and size of SPI registers map. +- clock : Clock phandle (see clock bindings for details). +- #address-cells : Number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells : Should be zero. +- pinctrl-names : Must be "default" +- pinctrl-n : At least one pinctrl phandle +- cs-gpios : Should specify GPIOs used for chipselects. + The gpios will be referred to as reg = <index> in the + SPI child nodes. + +Optional properties: +- num-cs : total number of chipselects + +Example: + + blsp1_spi1: spi@78b5000 { + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0x78b5000 0x600>; + clock = <&gcc 23>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "spi"; + pinctrl-0 = <&blsp_spi0>; + num-cs = <2>; + cs-gpios = <&soc_gpios 54 GPIO_ACTIVE_HIGH>, <&soc_gpios 4 GPIO_ACTIVE_HIGH>; + }; |