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| author | Tom Rini <trini@konsulko.com> | 2020-10-12 07:55:17 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-10-12 07:55:17 -0400 |
| commit | 9885313b9add6c04cf3059958c5ee51a4f0ac930 (patch) | |
| tree | 521f4068c38677a996fe4d9b61d842426af6cfb4 /doc | |
| parent | 47e9c70421d75336336097c1425028b40e4f0b54 (diff) | |
| parent | 505dc1c6795ba0b80abf344bb6464cdc20774f44 (diff) | |
| download | u-boot-9885313b9add6c04cf3059958c5ee51a4f0ac930.zip u-boot-9885313b9add6c04cf3059958c5ee51a4f0ac930.tar.gz u-boot-9885313b9add6c04cf3059958c5ee51a4f0ac930.tar.bz2 | |
Merge branch 'for-next' of https://github.com/lftan/u-boot
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.socfpga | 37 |
1 files changed, 33 insertions, 4 deletions
diff --git a/doc/README.socfpga b/doc/README.socfpga index cae0ef1..4d73398 100644 --- a/doc/README.socfpga +++ b/doc/README.socfpga @@ -16,9 +16,9 @@ controller support within SOCFPGA #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM --------------------------------------------------- -Generating the handoff header files for U-Boot SPL --------------------------------------------------- +--------------------------------------------------------------------- +Cyclone 5 / Arria 5 generating the handoff header files for U-Boot SPL +--------------------------------------------------------------------- This text is assuming quartus 16.1, but newer versions will probably work just fine too; verified with DE1_SOC_Linux_FB demo project (https://github.com/VCTLabs/DE1_SOC_Linux_FB). @@ -32,7 +32,7 @@ Rebuilding your Quartus project Choose one of the follwing methods, either command line or GUI. -Using the comaand line +Using the command line ~~~~~~~~~~~~~~~~~~~~~~ First run the embedded command shell, using your path to the Quartus install: @@ -147,3 +147,32 @@ Note: file sizes will differ slightly depending on the selected board. Now your board is ready for full mainline support including U-Boot SPL. The Preloader will not be needed any more. + +---------------------------------------------------------- +Arria 10 generating the handoff header files for U-Boot SPL +---------------------------------------------------------- + +A header file for inclusion in a devicetree for Arria10 can be generated +by the qts-filter-a10.sh script directly from the hps_isw_handoff/hps.xml +file generated during the FPGA project compilation. The header contains +all PLL, clock, pinmux, and bridge configurations required. + +Please look at the socfpga_arria10_socdk_sdmmc-u-boot.dtsi for an example +that includes use of the generated handoff header. + +Devicetree header generation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The qts-filter-a10.sh script can process the compile time genetated hps.xml +to create the appropriate devicetree header. + + + $ ./arch/arm/mach-socfpga/qts-filter-a10.sh \ + <hps_xml> \ + <output_file> + + hps_xml - hps_isw_handoff/hps.xml from Quartus project + output_file - Output filename and location for header file + +The script generates a single header file names <output_file> that should +be placed in arch/arm/dts. |