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| author | Michael Walle <michael@walle.cc> | 2020-05-07 00:11:58 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-05-07 11:05:01 -0400 |
| commit | 6333cbb3817ed551cd7d4e92f7359c73ccc567fc (patch) | |
| tree | 5ae23973fea2ab138c6ce63624637e60e1f4c570 /doc | |
| parent | fe6293a8095998affd5e46e7968485fcc332e0fa (diff) | |
| download | u-boot-6333cbb3817ed551cd7d4e92f7359c73ccc567fc.zip u-boot-6333cbb3817ed551cd7d4e92f7359c73ccc567fc.tar.gz u-boot-6333cbb3817ed551cd7d4e92f7359c73ccc567fc.tar.bz2 | |
phy: atheros: ar8035: remove static clock config
We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.
If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'doc')
0 files changed, 0 insertions, 0 deletions