Merge branch 'next' of git://git.denx.de/u-boot-coldfire

4 files changed, 47 insertions, 1 deletions

diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index 2cfe631..c4c5d50 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -33,6 +33,7 @@
 #include <command.h>
 #include <asm/immap.h>
 #include <netdev.h>
+#include "cpu.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -143,6 +144,11 @@ int checkcpu(void)
 
 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
+	/* Call the board specific reset actions first. */
+	if(board_reset) {
+		board_reset();
+	}
+
 	mbar_writeByte(MCF_RCM_RCR,
 		       MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
 	return 0;
diff --git a/cpu/mcf52x2/cpu.h b/cpu/mcf52x2/cpu.h
new file mode 100644
index 0000000..c1227eb
--- /dev/null
+++ b/cpu/mcf52x2/cpu.h
@@ -0,0 +1,33 @@
+/*
+ *  cpu.h
+ *
+ *  Copyright (c) 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CPU_H_
+#define _CPU_H_
+
+#include <command.h>
+
+/* Use this to create board specific reset functions */
+void board_reset(void) __attribute__((__weak__));
+
+#endif /* _CPU_H_ */
diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c
index 0d378e6..67f08c7 100644
--- a/cpu/mcf532x/speed.c
+++ b/cpu/mcf532x/speed.c
@@ -204,6 +204,8 @@ int clock_pll(int fsys, int flags)
 	fout = ((fref * mfd) / (BUSDIV * 4));
 #endif
 
+/* must not tamper with SDRAMC if running from SDRAM */
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
 	/*
 	 * Check to see if the SDRAM has already been initialized.
 	 * If it has then the SDRAM needs to be put into self refresh
@@ -254,6 +256,7 @@ int clock_pll(int fsys, int flags)
 
 	/* wait for DQS logic to relock */
 	for (i = 0; i < 0x200; i++) ;
+#endif /* !defined(CONFIG_MONITOR_IS_IN_RAM) */
 
 	return fout;
 }
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index a46c47a..5b134aa 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -45,6 +45,7 @@
 	addl	#60,%sp;		/* space for 15 regs */ \
 	rte;
 
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
 .text
 /*
  *	Vector table. This is used for initial platform startup.
@@ -121,6 +122,7 @@ vector192_255:
 .long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 .long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
 .long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+#endif /* !defined(CONFIG_MONITOR_IS_IN_RAM) */
 
 	.text
 
@@ -130,9 +132,11 @@ _start:
 	nop
 	move.w #0x2700,%sr	/* Mask off Interrupt */
 
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
 	/* Set vector base register at the beginning of the Flash */
 	move.l	#CONFIG_SYS_FLASH_BASE, %d0
 	movec	%d0, %VBR
+#endif
 
 	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
 	movec	%d0, %RAMBAR1
@@ -280,7 +284,7 @@ _int_handler:
 icache_enable:
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
+	move.l  #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0
 	movec	%d0, %ACR0			/* Enable cache */
 
 	move.l	#0x80000200, %d0		/* Setup cache mask */