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author | Wolfgang Denk <wd@denx.de> | 2008-12-16 01:02:17 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-12-16 01:02:17 +0100 |
commit | 455ae7e87f67c44e6aea68865c83acadd3fcd36c (patch) | |
tree | 9f3b69f9c1c2fcc8937e6bd964b1321ac17d45bc /cpu/mcf52x2 | |
parent | 84bc72d90c505fec3ef4b693995407a0bd4064e5 (diff) | |
download | u-boot-455ae7e87f67c44e6aea68865c83acadd3fcd36c.zip u-boot-455ae7e87f67c44e6aea68865c83acadd3fcd36c.tar.gz u-boot-455ae7e87f67c44e6aea68865c83acadd3fcd36c.tar.bz2 |
Coding style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/mcf52x2')
-rw-r--r-- | cpu/mcf52x2/cpu_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 18308c8..66f9164 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -131,7 +131,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* FlexBus Chipselect */ init_fbcs(); |